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HM5116405TS-7 Datasheet(PDF) 11 Page - Hitachi Semiconductor |
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HM5116405TS-7 Datasheet(HTML) 11 Page - Hitachi Semiconductor |
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11 / 35 page  HM5116405 Series, HM5117405 Series 11 AC Characteristics (Ta = 0 to +70 C, V CC = 5 V 10%, V SS = 0 V) * 1, *2, *18 Test Conditions Input rise and fall time: 2 ns Input levels: V IL = 0 V, VIH = 3 V Input timing reference levels: 0.8 V, 2.4 V Output timing reference levels: 0.8 V, 2.0 V Output load: 1 TTL gate + C L (100 pF) (Including scope and jig) Read, Write, Read-Modify-Write and Refresh Cycles (Common parameters) HM5116405/HM5117405 -5 -6 -7 Parameter Symbol Min Max Min Max Min Max Unit Notes Random read or write cycle timet RC 84 — 104 — 124 — ns precharge timet RP 30 — 40 — 50 — ns precharge timet CP 7 — 10 — 13 — ns pulse widtht RAS 50 10000 60 10000 70 10000 ns pulse widtht CAS 7 10000 10 10000 13 10000 ns Row address setup timet ASR 0 — 0 — 0 — ns Row address hold timet RAH 7 — 10 — 10 — ns Column address setup timet ASC 0 — 0 — 0 — ns Column address hold timet CAH 7 — 10 — 13 — ns to delay timet RCD 11 37 14 45 14 52 ns3 to column address delay timet RAD 9 25 12 30 12 35 ns4 hold timet RSH 10 — 13 — 13 — ns hold timet CSH 35 — 40 — 45 — ns to precharge timet CRP 5 — 5 — 5 — ns to Din delay timet OED 13 — 15 — 18 — ns5 delay time from Dint DZO 0 — 0 — 0 — ns6 delay time from Dint DZC 0 — 0 — 0 — ns6 Transition time (rise and fall)t T 2 50 2 50 2 50 ns7 |
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