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M25PE10-VMP6TG Datasheet(PDF) 4 Page - STMicroelectronics |
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M25PE10-VMP6TG Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 37 page M25PE10, M25PE20 4/37 SUMMARY DESCRIPTION The M25PE20 and M25PE10 are 2 Mbit (256K x 8 bit) and 1 Mbit (128K x8 bit) Serial Paged Flash Memories, respectively. They are accessed by a high speed SPI-compatible bus. The memories can be written or programmed 1 to 256 Bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle fol- lowed by a Page Program cycle. The M25PE20 memory is organized as 4 sectors, each containing 256 pages. Each page is 256 Bytes wide. Thus, the whole memory can be viewed as consisting of 1024 pages, or 262,144 Bytes. The M25PE10 memory is organized as 2 sectors, each containing 256 pages. Each page is 256 Bytes wide. Thus, the whole memory can be viewed as consisting of 512 pages, or 131, 072 Bytes. The memories can be erased a page at a time, us- ing the Page Erase instruction, or a sector at a time, using the Sector Erase instruction. The top sector of the memories can be Write Pro- tected by Hardware (TSL). In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK is an ST trademark. ECOPACK speci- fications are available at: www.st.com. Figure 2. Logic Diagram Table 1. Signal Names Figure 3. VDFPN AND SO Connections Note: 1. There is an exposed die paddle on the underside of the MLP8 package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB. 2. See PACKAGE MECHANICAL section for package di- mensions, and how to identify pin-1. Reset AI09713 S VCC M25PE20 M25PE10 VSS TSL Q C D C Serial Clock D Serial Data Input Q Serial Data Output S Chip Select TSL Top Sector Lock Reset Reset VCC Supply Voltage VSS Ground 1 AI09715 2 3 4 8 7 6 5 D VSS C Reset Q SVCC TSL M25PE20 M25PE10 |
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