1

NOVEMBER 2003

512 x 36

1,024 x 36

2,048 x 36

IDT72V3631

IDT72V3641

IDT72V3651

2003 Integrated Device Technology, Inc.

All rights reserved.

Product specifications subject to change without notice.

DSC-4658/1

IDT and the IDT logo are registered trademark of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE



1

Mail 1

Register

CLKA

CSA

W/

RA

ENA

MBA

Port-A

Control

Logic

Reset

Logic

RST

CLKB

CSB

W/RB

ENB

MBB

Port-B

Control

Logic

MBF1

OR

AE

4658 drw 01

Mail 2

Register

Write

Pointer

Read

Pointer

Status Flag

Logic

MBF2

IR

AF

SEN

Flag Offset

Registers

10

RTM

RFM

RAM ARRAY

512 x 36

1,024 x 36

2,048 x 36

36

FEATURES

IDT72V3631 - 512 x 36

IDT72V3641 - 1,024 x 36

IDT72V3651 - 2,048 x 36

dent (permits simultaneous reading and writing of data on a

single clock edge)

CLKA

by CLKB

saving 120-pin thin quad flat package (TQFP)

IDT723631/723641/723651

°°°°°C to +85°°°°°C) is available

DESCRIPTION

The IDT72V3631/72V3641/72V3651 are pin and functionally compatible

versons of the IDT723631/723641/723651, designed to run off a 3.3V supply

for exceptionally low-power consumption. These devices are monolithic high-

speed,low-power,CMOSclockedFIFOmemory. Itsupportsclockfrequencies

up to 67 MHz and has read access times as fast as 10ns. The 512/1,024/2,048

x36dual-portSRAMFIFObuffersdatafromportAtoPortB. TheFIFOmemory

has retransmit capability, which allows previously read data to be accessed

again. The FIFO operates in First Word Fall Through mode and has flags to

indicate empty and full conditions and conditions and two programmable flags

(Almost-Full and Almost-Empty) to indicate when a selected number of words

is stored in memory. Communication between each port may take place with

FUNCTIONAL BLOCK DIAGRAM