HANBit

HSD8M64D8A

URL : www.hbe.co.kr

HANBit Electronics Co.,Ltd.

REV.1.0(August.2002)

PIN FUNCTION DESCRIPTION

PIN

NAME

INPUT FUNCTION

CLK

System clock

Active on the positive going edge to sample all inputs.

/CE

Chip enable

Disables or enables device operation by masking or enabling all inputs except

CLK, CKE and DQM

CKE

Clock enable

Masks system clock to freeze operation from the next clock cycle.

CKE should be enabled at least one cycle prior to new command.

Disable input buffers for power down in standby.

CKE should be enabled 1CLK+tSS prior to valid command.

A0 ~ A11

Address

Row/column addresses are multiplexed on the same pins.

Row address : RA0 ~ RA11, Column address : CA0 ~ CA8

BA0 ~ BA1

Bank select address

Selects bank to be activated during row address latch time.

Selects bank for read/write during column address latch time.

/RAS

Row address strobe

Latches row addresses on the positive going edge of the CLK with RAS low.

Enables row access & precharge.

/CAS

Column

address

strobe

Latches column addresses on the positive going edge of the CLK with CAS low.

Enables column access.

/WE

Write enable

Enables write operation and row precharge.

Latches data in starting from CAS, WE active.

DQM0 ~ 7

Data

input/output

mask

Makes data output Hi-Z, tSHZ after the clock and masks the output.

Blocks data input when DQM active. (Byte masking)

DQ0 ~ 63

Data input/output

Data inputs/outputs are multiplexed on the same pins.

VDD/VSS

Power

supply/ground

Power and ground for the input buffers and the core logic.

ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL

RATING

Voltage on Any Pin Relative to Vss

-1V to 4.6V

Voltage on Vcc Supply Relative to Vss

Vcc

-1V to 4.6V

Power Dissipation

8W

Storage Temperature

-55oC to 150oC

Short Circuit Output Current

400mA

Notes:

Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded.

Functional operation should be

restricted to the conditions as detailed in the operational sections of this data sheet.

Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.