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XRT71D03 Datasheet(PDF) 4 Page - Exar Corporation |
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XRT71D03 Datasheet(HTML) 4 Page - Exar Corporation |
4 / 24 page XRT71D03 áç áç áç áç 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR REV. 1.2.0 3 PIN DESCRIPTIONS PIN DESCRIPTION PIN #NAME TYPE DESCRIPTION 1 AVDD **** Analog Power Supply = 5V±5% or 3.3V±5% 2 GND **** Digital Power Supply = 5V±5% or 3.3V±5% 3 RRCLK_0 O Received Recovered Output (De-jittered) Clock - channel 0: Output the de-jittered or smoothed clock if the jitter attenuator is enabled. The de-jittered data, RRPOS/RRNEG are clocked to this signal. If RRCLKES is “low”, RRPOS/RRNEG will be updated at the falling edge of RRCLK. If RRCLKES is “high”, RRPOS/RRNEG will be updated at the rising edge of RRCLK. 4 RRPOS_0 O Received Recovered Positive Data (De-Jittered) Output - channel 0: De-jittered positive data output. Updated on the rising or falling edge of RRCLK, depending upon the state of the RRCLKES input pin (or bit-field set- ting). 5 RRNEG_0 O Received Recovered Negative Data (De-Jittered) Output - channel 0: De-jittered negative data output. Updated on the rising or falling edge of RRCLK, depending upon the state of the RRCLKES input pin (or bit-field set- ting). 6 RRCLKES I Received Recovered Clock Edge Select Input: Hardware Mode: 1. When RRCLKES = “0”, then RRPOS and RRNEG are updated on the fall- ing edge of RRCLK 2. When RRCLKES = “1”, then RRPOS and RRNEG are updated on the rising edge of RRCLK NOTE: This applies to all channels. Host Mode Connect this pin to GND when the 71D03 is configured in the Host Mode. Internal 50 K Ohm pull-down resistor. 7 NC No Connection 8 Rest I Reset Input. (Active-Low): A high-low transition will re-center the internal FIFO, and will clear the Com- mand Registers (for Host Mode operation). Resetting this pin may corrupt data within the device. For normal operation, pull this pin to VDD. Internal 50 K Ohm pull-up resistor. 9 DS3/E3_1 I DS3/E3 Select Input - channel 1: This pin along with the STS-1 mode select pin selects the operating mode. The following table provides the configuration: STS-1 DS3/E3 XRT71D04 Operating Mode 0 0 DS3 (44.736 MHz) 0 1 E3 (34.368 MHz) 1 0 STS-1 (51.84 MHz) 1 1 E3 (34.368 MHz) Internal 50 K Ohm pull-down resistor. 10 VDD **** Digital Power Supply = 5V±5% or 3.3V±5% |
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