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XRT71D03IV Datasheet(PDF) 8 Page - Exar Corporation |
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XRT71D03IV Datasheet(HTML) 8 Page - Exar Corporation |
8 / 24 page XRT71D03 áç áç áç áç 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR REV. 1.2.0 7 46 RRCLK_1 O Received Recovered Output (De-jittered) Clock - channel 1: See description of pin 3. 47 GND **** Digital Ground 48 AVDD **** Analog Power Supply = 5 V±5% or 3.3V±5% 49 AGND **** Analog Ground 50 FL_1 O FIFO Limit - channel 1: See description pin 18 51 STS1_1 I SONET STS1 Mode Select - channel 1: See description pin 19 52 MCLK_1 I Master Clock Input - channel 1: See description pin 28. Internal 50 K Ohm pull-up resistor. 53 GND **** Digital Ground 54 RCLK_1 I Received Clock (Jittery) - channel 1: See description of pin 26. Internal 50 K Ohm pull-up resistor. 55 RPOS_1 I Received Positive Data (Jittery) Input: - channel 1: See description of pin 23. Internal 50 K Ohm pull-up resistor. 56 RNEG_1 I Received Negative Data (Jittery) - channel 1: See description of pin 24. Internal 50 K Ohm pull-up resistor. 57 VDD **** Digital Power Supply = 5V±5% or 3.3V±5% 58 RNEG_0 I Received Negative Data (Jittery) - channel 0: See description of pin 24. Internal 50 K Ohm pull-up resistor. 59 RPOS_0 I Received Positive Data (Jittery) Input: - channel 0: See description of pin 23. Internal 50 K Ohm pull-up resistor. 60 RCLK_0 I Received Clock (Jittery) - channel 0: See description of pin 26. Internal 50 K Ohm pull-up resistor. 61 GND **** Digital Ground 62 MCLK_0 I Master Clock Input - channel 0: See description pin 28. Internal 50 K Ohm pull-up resistor. PIN DESCRIPTION PIN #NAME TYPE DESCRIPTION |
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