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XRT72L71IQ Datasheet(PDF) 10 Page - Exar Corporation |
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XRT72L71IQ Datasheet(HTML) 10 Page - Exar Corporation |
10 / 102 page XRT72L71 áç áç áç áç DS3 ATM UNI/CLEAR CHANNEL FRAMER REV. 1.1.0 6 13 D9 I/O Bi-Directional Data bus (Microprocessor Interface Section): This pin is inactive if the Microprocessor Interface block is configured to operate over an 8 bit data bus. Please see description for D15, pin1. 14 D8 I/O Bi-Directional Data bus (Microprocessor Interface Section): This pin is inactive if the Microprocessor Interface block is configured to operate over an 8 bit data bus. Please see description for D15, pin1. 15 VDD *** Power Supply Pin 16 17 18 19 D7 D6 D5 D4 I/O Bi-Directional Data bus (Microprocessor Interface Section): Please see description for D15, pin 1. 20 Width16 I Microprocessor Interface Block Data Bus Width Selector: This input pin permits the user to configure the microprocessor interface of the UNI/Framer, to operate over either an 8 or 16 bit wide bi-directional data bus. Tying this pin to VDD configures the Microprocessor Interface Data Bus width to be 16 bits. Tying this pin to GND configures the Microprocessor Interface Data Bus width to be 8 bits. 21 D3 I/O Bi-Directional Data bus (Microprocessor Interface Section): Please see description for D15, pin 1. 22 EncoDis O Encoder (B3ZS) Disable Output pin (intended to be connected to the XRT7300 E3/DS3/STS-1 LIU IC): This output pin is intended to be connected to the EncoDis input pin of the XRT7300 LIU IC. The user can control the state of this output pin by writing a “0” or “1” to Bit 3 (EncoDis) of the Line Interface Driver Register (Address = 0x72). If the user commands this signal to toggle “High” then it will disable the B3ZS encoder circuitry within the XRT7300 IC. Conversely, if the user commands this output signal to toggle “Low”, then the B3ZS Encoder circuitry, within the XRT7300 IC will be enabled. Writing a “1” to Bit 3 of the Line Interface Driver Register (Address = 0x72) will cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause this output pin to toggle “Low”. NOTES: 1. The user is advised to disable the B3ZS encoder (within the XRT7300 IC) if the Transmit and Receive DS3 Framers (within the UNI) are con- figured to operate in the B3ZS line code. 2. If the designer is not using the XRT7300 DS3/E3/STS-1 Line Trans- mitter IC, then output pin can be used for other purposes. 23 D2 I/O Bi-Directional Data bus (Microprocessor Interface Section): Please see description for D15, pin1. PIN DESCRIPTION (CONTINUED) PIN NO. SYMBOL TYPE DESCRIPTION |
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