Electronic Components Datasheet Search |
|
XRT74L74 Datasheet(PDF) 9 Page - Exar Corporation |
|
XRT74L74 Datasheet(HTML) 9 Page - Exar Corporation |
9 / 498 page XRT74L74 4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER PRELIMINARY REV. P1.1.1 VII 6.1 DESCRIPTION OF THE E3, ITU-T G.751 FRAMES AND ASSOCIATED OVERHEAD BITS .................... 295 FIGURE 104. THE E3, ITU-T G.751 FRAMING FORMAT. ...................................................................................................................... 295 6.1.1 DEFINITION OF THE OVERHEAD BITS.................................................................................................................. 295 6.2 THE TRANSMIT SECTION OF THE XRT74L74 (E3, ITU-T G.751 MODE OPERATION) .......................... 296 FIGURE 105. THE XRT74L74 TRANSMIT SECTION WHEN IT HAS BEEN CONFIGURED TO OPERATE IN THE E3 MODE............................... 296 6.2.1 THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK ........................................................................... 296 FIGURE 106. THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK................................................................................................ 297 TABLE 62: LISTING AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT INTERFACE ....................... 298 FIGURE 107. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 1 (SERIAL/LOOP-TIMED) OPERATION .................................................................................................................. 300 TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) ................................................................................................ 301 FIGURE 108. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK AND THE TERMINAL EQUIPMENT (FOR MODE 1 OPERATION) ................................................................................................. 302 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 302 FIGURE 109. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 2 (SERIAL/LOCAL-TIMED/FRAME-SLAVE) OPERATION .......................................................................................... 303 FIGURE 110. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (MODE 2 OPERATION) 304 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 304 FIGURE 111. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 3 (SERIAL/LOCAL-TIME/FRAME-MASTER) OPERATION ......................................................................................... 305 FIGURE 112. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (E3 MODE 3 OPER- ATION ) ................................................................................................................................................................................ 306 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 306 FIGURE 113. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION .................................................................................................. 307 FIGURE 114. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (MODE 4 OPERATION) 308 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 308 FIGURE 115. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 5 (NIBBLE-PARALLEL/LOCAL-TIMED/FRAME-SLAVE) OPERATION .......................................................................... 309 FIGURE 116. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (E3, MODE 5 OPER- ATION ) ................................................................................................................................................................................ 310 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 310 FIGURE 117. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT74L74 FOR MODE 6 (NIBBLE-PARALLEL/LOCAL-TIMED/FRAME-MASTER) OPERATION ....................................................................... 311 FIGURE 118. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (E3 MODE 6 OPER- ATION ) ................................................................................................................................................................................ 312 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ......................................................................................... 312 6.2.2 THE TRANSMIT OVERHEAD DATA INPUT INTERFACE ...................................................................................... 313 FIGURE 119. THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK.............................................................................................. 313 TABLE 63: A LISTING OF THE OVERHEAD BITS WITHIN THE E3 FRAME, AND THEIR POTENTIAL SOURCES ................................................ 314 TABLE 64: DESCRIPTION OF METHOD 1 TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS ................................................................... 315 FIGURE 120. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT OVERHEAD DATA INPUT INTERFACE (METHOD 1) ......... 316 TABLE 65: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN TXOHCLK, (SINCE TXOHFRAME WAS LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING PROCESSED ........................................................................................................ 317 FIGURE 121. ILLUSTRATION OF THE SIGNAL THAT MUST OCCUR BETWEEN THE TERMINAL EQUIPMENT AND THE XRT74L74 IN ORDER TO CON- FIGURE THE XRT74L74 TO TRANSMIT A YELLOW ALARM TO THE REMOTE TERMINAL EQUIPMENT ........................................... 318 TABLE 66: DESCRIPTION OF METHOD 2 TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS ................................................................... 319 FIGURE 122. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT OVERHEAD DATA INPUT INTERFACE (METHOD 2) ......... 320 TABLE 67: THE RELATIONSHIP BETWEEN THE NUMBER OF TXOHENABLE PULSES (SINCE THE LAST OCCURRENCE OF THE TXOHFRAME PULSE) TO THE E3 OVERHEAD BIT, THAT IS BEING PROCESSED BY THE XRT74L74 .......................................................................... 321 FIGURE 123. BEHAVIOR OF TRANSMIT OVERHEAD DATA INPUT INTERFACE SIGNALS BETWEEN THE XRT74L74 AND THE TERMINAL EQUIPMENT (FOR METHOD 2)................................................................................................................................................................. 322 6.2.3 THE TRANSMIT E3 HDLC CONTROLLER.............................................................................................................. 322 FIGURE 124. LAPD MESSAGE FRAME FORMAT................................................................................................................................... 323 TABLE 68: THE LAPD MESSAGE TYPE AND THE CORRESPONDING VALUE OF THE FIRST BYTE, WITHIN THE INFORMATION PAYLOAD ...... 324 TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) ................................................................................................ 324 TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33).......................................................................... 325 TABLE 69: RELATIONSHIP BETWEEN TXLAPD MSG LENGTH AND THE LAPD MESSAGE SIZE ................................................................ 325 TXE3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ...................................................................................... 325 TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33).......................................................................... 326 TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................................................... 326 TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................................................... 327 |
Similar Part No. - XRT74L74 |
|
Similar Description - XRT74L74 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |