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XRT79L73IB Datasheet(PDF) 11 Page - Exar Corporation |
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XRT79L73IB Datasheet(HTML) 11 Page - Exar Corporation |
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11 / 71 page  ÿþ ÿþ ÿþ ÿþ PRELIMINARY XRT79L73 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC REV. P1.0.0 9 AD2 Y22 AB4 TxOH1/ TxHDLCDat1_5 TxOH2/ TxHDLCDat2_5 TxOH3/ TxHDLCDat3_5 I I I Transmit Overhead Data Input/Transmit HDLC Controller Data Bit 5 input pins: The function of these input pins depend upon whether or not the XRT79L73 has been configured to operate in the High-Speed HDLC Controller Mode. Non-High Speed HDLC Controller Mode - TxOH: The Transmit Overhead Data Input Interface accepts overhead via these input pins, and insert this data into the overhead bit positions within the outbound DS3 or E3 frames. If the TxOHIns input pins are pulled "High", then the Transmit Overhead Data Input Interface will sample the overhead data, via these input pins, upon the falling edge of the TxOHClk output signals. Conversely, if the TxOHIns input pins are NOT pulled "High", then the Transmit Overhead Data Input Interface block will be inactive and will not accept any over- head data via the TxOH input pins. High Speed HDLC Controller Mode - TxHDLCDat_5: If the XRT79L73 is configured to operate in the High-Speed HDLC Controller mode, then the local terminal equipment will be provided with a byte-wide Trans- mit HDLC Controller byte-wide input interface. These input pins will function as Bit 5 within this byte wide interface. Data, residing on the Transmit HDLC Controller byte wide input interface, will be sampled upon the rising edge of the TxHDLCClk output signals. AC2 W26 AB3 TxOHIns1/ TxHDLCDat1_4 TxOHIns2/ TxHDLCDat2_4 TxOHIns3/ TxHDLCDat3_4 I I I Transmit Overhead Data Insert Input/Transmit HDLC Controller Data Bit 4 input pins: The function of these input pins depend upon whether or not the XRT79L73 has been configured to operate in the High-Speed HDLC Controller Mode. Non-High Speed HDLC Controller Mode - TxOHIns: This input pins are used to either enable or disable the Transmit Overhead Data Input Interface block. If the Transmit Overhead Data Input Interface block is enabled, then it will accept overhead data from the local terminal equipment via the TxOH input pins; and insert this data into the overhead bit positions within the outbound DS3 or E3 data stream. Conversely, if the Transmit Overhead Data Input Interface block is disabled, then it will NOT accept overhead data from the local terminal equipment. Pulling these input pins "High" enables the Transmit Overhead Data Input Interface block. Pulling these input pins "Low" disables the Transmit Overhead Data Input Interface block. High-Speed HDLC Controller Mode - TxHDLCDat_4: If the XRT79L73 is configured to operate in the High-Speed HDLC Controller mode, then the local terminal equipment will be provided with a byte-wide Trans- mit HDLC Controller byte-wide input interface. These input pins will function as Bit 4 within this byte wide interface. Data, residing on the Transmit HDLC Controller byte wide input interface, will be sampled upon the rising edge of the TxHDLCClk output signals. G3 A26 J1 TxOHClk1 TxOHClk2 TxOHClk3 O O O Transmit Overhead Clock Output: These output pins functions as the Transmit Overhead Data Input Interface clock signals. If the user enables the Transmit Overhead Data Input Interface block by asserting the TxOHIns input pins, then the Transmit Overhead Data Input Inter- face block will sample and latch the data residing on the TxOH input pins upon the falling edge of these signals. NOTE: The Transmit Overhead Data Input Interface block is disabled if the user has configured the XRT79L73 to operate in the High-Speed HDLC Controller Mode. PIN #NAME TYPE DESCRIPTION |
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