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XRT91L82IB Datasheet(PDF) 7 Page - Exar Corporation |
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XRT91L82IB Datasheet(HTML) 7 Page - Exar Corporation |
7 / 59 page xr xr xr xr PRELIMINARY XRT91L82 REV. P1.0.5 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER 4 PIN DESCRIPTIONS COMMON CONTROL NAME LEVEL TYPE PIN DESCRIPTION RESET LVTTL, LVCMOS I E5 Master Reset Input Active low signal. When this pin is pulled "Low" for more than 30ns, the internal registers are set to their default state. See the register description for the default values. This pin is provided with an internal pull-up. PIO_CFG1 PIO_CFG0 LVTTL, LVCMOS I D3 E3 Parallel I/O Configuration Selects parallel I/O to be differential LVDS, differential LVPECL, or Single-Ended LVPECL based on table below. This pin is provided with an internal pull-down. XRES1P XRES1N - I E14 F14 External LVDS Biasing Resistors A 402 Ω resistor with +/-1% tolerance should be placed across these 2 pins for proper biasing. Although unecessary in LVPECL operation, this resistor is required in LVDS operation. See Figure 8 on page 22. SE_REF Analog O L7 Single-Ended LVPECL Biasing Output Reference VBB 100K output bias reference. Maximum load capacitance is 30pF. Maximum sourcing/sinking capability is 750 µA and 1000µA respectively. SEREFDIS LVTTL, LVCMOS I C3 SE_REF Power down Control Powers down SE_REF and reduces power consumption. "Low" = SE_REF Enabled "High" = SE_REF Disabled This pin is provided with an internal pull-up. REF1CLKP REF1CLKN LVPECL Diff I A13 B13 Reference Clock Input 1 This differential clock input reference is used for the transmit clock multiplier unit (CMU) and clock data recovery (CDR) to provide the necessary high-speed clock reference for this device. Pin REFREQSEL[1:0] determines the value used as the reference. See Pin REFREQSEL[1:0] for more details. Internally terminated and biased. PIO_CFG [1:0] VDD_I/O Input Configuration Output Configuration 00 3.3V 3.3V Differential LVPECL 3.3V Differential LVPECL 01 3.3V 3.3V Single-Ended LVPECL 3.3V Single-Ended LVPECL 10 3.3V 3.3V Differential LVDS 3.3V Differential LVDS 11 Reserved |
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