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UT7C138C45WPC Datasheet(PDF) 10 Page - Aeroflex Circuit Technology

Part # UT7C138C45WPC
Description  4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

UT7C138C45WPC Datasheet(HTML) 10 Page - Aeroflex Circuit Technology

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10
Address
CE
R/ W
Data in
OE
Data out
tWC
tSCE
tAW
tPWE
t
HA
tSA
tSD
tHZOE
t
LZOE
DATA VALID
HIGH IMPE DANCE
HIGH IMPE DANCE
tHD
Assumptions:
1. The internal write time of memory is defined by the overlap of CE
LOW and R/W LOW. Both signals must be LOW to initiate a write,
and either signal can terminate a write by going HIGH. The data input
set-up and hold timing should be referenced to the rising edge of the
signal that terminates the write.
2. If OE is LOW during a R/W controlled write cycle, the write pulse
width must be the larger of tPWE or (tHZWE + tSD ) to allow the I/O
drivers to turn off and data to be placed on the bus for the required t SD.
If OE is HIGH during a R/W controlled write cycle (as in this exam-
ple), this requirement does not apply and the write pulse can be as
short as the specified tPWE.
3. R/W must be HIGH during all address transactions.
Figure 4a. Write Cycle 1: OE Three-States Data I/Os (Either Port)


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