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74ABTH16841A Datasheet(PDF) 6 Page - NXP Semiconductors |
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74ABTH16841A Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 10 page  Philips Semiconductors Product specification 74ABT16841A 74ABTH16841A 20-bit bus interface latch (3-State) 1998 Feb 27 6 AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min Max ts(H) ts(L) Setup time, High or Low nDx to nLE 3 2.0 1.0 1.0 0.4 2.0 1.0 ns th(H) th(L) Hold time, High or Low nDx to nLE 3 2.0 2.0 –0.3 –0.7 2.0 2.0 ns tw(H) nLE pulse width High 1 2.9 1.9 2.9 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V tw(H) tPHL tPLH nLE nQx SA00078 VM VM VM VM VM 3.0V or VCC whichever is less 0V VOH VOL Waveform 1. Propagation Delay, Latch Enable Input to Output, and Enable Pulse Width nDx INPUT VM tPLH tPHL nQx OUTPUT VM VM VM SA00079 3.0V or VCC whichever is less 0V 3.0V or VCC whichever is less 0V Waveform 2. Propagation Delay for Data to Outputs NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM nDx VM VM VM VM nLE ts(H) th(H) ts(L) th(L) SA00080 VM 0V 0V 3.0V or VCC whichever is less 3.0V or VCC whichever is less Waveform 3. Data Setup and Hold Times VY VM VM VM nQx tPZH tPHZ SH00007 nOE 0V VOH 0V 3.0V or VCC whichever is less Waveform 4. 3–State Output Enable Time to High Level and Output Disable Time from High Level VX VM VM VM nQx tPZL tPLZ SH00008 nOE VOL 0V 0V 3.0V or VCC 3.0V or VCC whichever is less Waveform 5. 3–State Output Enable Time to Low Level and Output Disable Time from Low Level |
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