Detailed Description

The MAX5078A/MAX5078B have internal undervoltage

threshold, OUT is pulled low independent of the state of

the inputs. The undervoltage lockout is typically 3.5V with

rises above the UVLO threshold, the output goes high or

using a low-ESR ceramic capacitor for proper operation

(see the Applications Information section).

Logic Inputs

The MAX5078A has CMOS logic inputs while the

MAX5078B has TTL-compatible logic inputs. The logic

inputs are protected against the voltage spikes up to

respectively, to avoid double pulsing during transition.

The low 2.5pF input capacitance reduces loading and

increases switching speed.

The logic inputs are high impedance and must not be left

floating. If the inputs are left open, OUT can go to an

threshold. Therefore, the PWM output from the controller

must assume proper state when powering up the device.

The MAX5078A/MAX5078B have two logic inputs, provid-

ing greater flexibility in controlling the MOSFET. Use IN+

for noninverting logic and IN- for inverting logic operation.

Alternatively, the unused input can be used as an

ON/OFF function. Use IN+ for active-low shutdown logic

Driver Output

and n-channel devices (totem pole) in the output stage

for the fast turn-on/turn-off, high-gate-charge switching

MOSFETs. The peak source or sink current is typically

higher source-/sink-current capability and faster switch-

ing speeds. The propagation delays from the noninvert-

ing and inverting logic inputs to OUT are matched to 2ns

typically. The break-before-make logic avoids any cross-

conduction between the internal p- and n-channel

devices, and eliminates shoot-through, thus reducing the

quiescent supply current.

Applications Information

RLC Series Circuit

circuit with a second-order characteristic equation. The

series RLC circuit has an undamped natural frequency

(

The damping ratio needs to be greater than 0.5 (ideally

series with the gate when driving a very low gate-

charge MOSFET, or when the driver is placed away

from the MOSFET.

ϖ

ξ

0

1

2

=

++

×

=

×

++

()

()

LLL

C

R

LLL

C

PSG

G

ON

PSG

G

4A, 20ns, MOSFET Driver

8

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Pin Description

PIN

NAME

FUNCTION

1

IN-

Inverting Logic-Input Terminal. Connect to GND when not used.

2, 3

GND

Ground

Power Supply. Bypass to GND with one or more 0.1µF ceramic capacitors.

5

OUT

Driver Output. Sources or sinks current to turn the external MOSFET on or off.

6

IN+

—EP

Exposed Pad. Internally connected to GND. Do not use the exposed pad as the only electrical

ground connection.