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BH16952DGG Datasheet(PDF) 7 Page - NXP Semiconductors |
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BH16952DGG Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 12 page Philips Semiconductors Product specification 74ABT16952 74ABTH16952 16-bit registered transceiver (3-State) 1998 Feb 25 7 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C Tamb = –40°C to +85 °C UNIT MIN TYP MAX MIN MAX VIK Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VOH High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IOL = 1mA; VI = GND or VCC 0.13 0.55 0.55 V II Input leakage current Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA Bus Hold current A inputs6 VCC = 4.5V, VI = 0.8V 50 50 IHOLD Bus Hold current A inputs6 74ABTH16952 VCC = 4.5V; VI = 2.0V –75 –75 µA 74ABTH16952 VCC = 5.5V; VI = 0 to 5.5V ±500 IOFF Power-off leakage current VCC = 0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA IPU/PD Power-up/down 3-State output current4 VCC = 2.1V; VO = 0.0V; VI = GND or VCC; VOE = Don’t care ±5.0 ±50 ±50 µA IIH + IOZH 3-State output High current VCC = 5.5V; VO = 5.5V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.0V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or Vcc 5.0 50 50 µA IO Output current1 VCC = 5.5V; VO = 2.5V –50 –70 –180 –50 –180 mA ICCH VCC = 5.5V; Outputs High, VI = GND or VCC 0.5 1.5 1.5 mA ICCL Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or VCC 8 19 19 mA ICCZ Quiescent su ly current VCC = 5.5V; Outputs 3-State; VI = GND or VCC 0.5 1.5 1.5 mA ∆ICC Additional supply current per input pin2 74ABT16952 VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 5 100 100 µA ∆ICC Additional supply current per input pin2 74ABTH16952 VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 100 500 500 µA NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100 µsec is permitted. 5. Unused pins at VCC or GND. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25°C VCC = +5.0V Tamb = –40°C to +85°C VCC = +5.0V ±0.5V UNIT MIN TYP MAX MIN MAX fMAX Maximum clock frequency 1 150 150 MHz tPLH tPHL Propagation delay nCPBA to nAx, nCPAB to nBx 1 1.0 1.0 2.8 2.3 3.9 3.9 1.0 1.0 4.3 4.3 ns tPZH tPZL Output enable time nOEBA to nAx, nOEAB to nBx 3 4 1.0 1.0 2.5 2.2 3.8 3.8 1.0 1.0 4.6 4.6 ns tPHZ tPLZ Output disable time nOEBA to nAx, nOEAB to nBx 3 4 1.7 1.3 3.4 2.6 4.4 3.9 1.7 1.3 5.2 4.2 ns |
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