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GS881Z32BGT-250IV Datasheet(PDF) 5 Page - GSI Technology |
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GS881Z32BGT-250IV Datasheet(HTML) 5 Page - GSI Technology |
5 / 37 page 100-Pin TQFP Pin Descriptions Symbol Type Description A0, A1 In Burst Address Inputs; Preload the burst counter A In Address Inputs CK In Clock Input Signal BA In Byte Write signal for data inputs DQA1–DQA9; active low BB In Byte Write signal for data inputs DQB1–DQB9; active low BC In Byte Write signal for data inputs DQC1–DQC9; active low BD In Byte Write signal for data inputs DQD1–DQD9; active low W In Write Enable; active low E1 In Chip Enable; active low E2 In Chip Enable—Active High. For self decoded depth expansion E3 In Chip Enable—Active Low. For self decoded depth expansion G In Output Enable; active low ADV In Advance/Load; Burst address counter control pin CKE In Clock Input Buffer Enable; active low NC — No Connect DQA I/O Byte A Data Input and Output pins DQB I/O Byte B Data Input and Output pins DQC I/O Byte C Data Input and Output pins DQD I/O Byte D Data Input and Output pins ZZ In Power down control; active high FT In Pipeline/Flow Through Mode Control; active low LBO In Linear Burst Order; active low. TMS Scan Test Mode Select TDI Scan Test Data In TDO Scan Test Data Out TCK Scan Test Clock VDD In Core power supply VSS In Ground VDDQ In Output driver power supply GS881Z18/32/36B(T/D)-xxxV Rev: 1.00 6/2006 5/37 © 2006, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. |
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