Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

GS8162Z72C Datasheet(PDF) 6 Page - GSI Technology

Part # GS8162Z72C
Description  18Mb Pipelined and Flow Through Synchronous NBT SRAM
Download  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  GSI [GSI Technology]
Direct Link  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8162Z72C Datasheet(HTML) 6 Page - GSI Technology

Back Button GS8162Z72C Datasheet HTML 2Page - GSI Technology GS8162Z72C Datasheet HTML 3Page - GSI Technology GS8162Z72C Datasheet HTML 4Page - GSI Technology GS8162Z72C Datasheet HTML 5Page - GSI Technology GS8162Z72C Datasheet HTML 6Page - GSI Technology GS8162Z72C Datasheet HTML 7Page - GSI Technology GS8162Z72C Datasheet HTML 8Page - GSI Technology GS8162Z72C Datasheet HTML 9Page - GSI Technology GS8162Z72C Datasheet HTML 10Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 31 page
background image
Synchronous Truth Table
Operation
Type Address CK CKE ADV W Bx E1 E2 E3 G ZZ
DQ
Notes
Read Cycle, Begin Burst
R
External
L-H
L
L
H
X
L
H
L
L
L
Q
Read Cycle, Continue Burst
B
Next
L-H
L
H
X
X
X
X
X
L
L
Q
1,10
NOP/Read, Begin Burst
R
External
L-H
L
L
H
X
L
H
L
H
L
High-Z
2
Dummy Read, Continue Burst
B
Next
L-H
L
H
X
X
X
X
X
H
L
High-Z
1,2,10
Write Cycle, Begin Burst
W
External
L-H
L
L
L
L
L
H
L
X
L
D
3
Write Cycle, Continue Burst
B
Next
L-H
L
H
X
L
X
X
X
X
L
D
1,3,10
Write Abort, Continue Burst
B
Next
L-H
L
H
X
H
X
X
X
X
L
High-Z 1,2,3,10
Deselect Cycle, Power Down
D
None
L-H
L
L
X
X
H
X
X
X
L
High-Z
Deselect Cycle, Power Down
D
None
L-H
L
L
X
X
X
X
H
X
L
High-Z
Deselect Cycle, Power Down
D
None
L-H
L
L
X
X
X
L
X
X
L
High-Z
Deselect Cycle
D
None
L-H
L
L
L
H
L
H
L
X
L
High-Z
1
Deselect Cycle, Continue
D
None
L-H
L
H
X
X
X
X
X
X
L
High-Z
1
Sleep Mode
None
X
X
X
X
X
X
X
X
X
H
High-Z
Clock Edge Ignore, Stall
Current
L-H
H
X
X
X
X
X
X
X
L
-
4
Notes:
1. Continue Burst cycles, whether read or write, use the same control inputs. A Deselect continue cycle can only be entered into if a Dese-
lect cycle is executed first.
2. Dummy Read and Write abort can be considered NOPs because the SRAM performs no operation. A Write abort occurs when the W
pin is sampled low but no Byte Write pins are active so no write operation is performed.
3. G can be wired low to minimize the number of control signals provided to the SRAM. Output drivers will automatically turn off during
write cycles.
4. If CKE High occurs during a pipelined read cycle, the DQ bus will remain active (Low Z). If CKE High occurs during a write cycle, the bus
will remain in High Z.
5.
X = Don’t Care; H = Logic High; L = Logic Low; Bx = High = All Byte Write signals are high; Bx = Low = One or more Byte/Write
signals are Low
6. All inputs, except G and ZZ must meet setup and hold times of rising clock edge.
7. Wait states can be inserted by setting CKE high.
8. This device contains circuitry that ensures all outputs are in High Z during power-up.
9. A 2-bit burst counter is incorporated.
10. The address counter is incriminated for all Burst continue cycles.
GS8162Z72C
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.22 11/2005
6/31
© 1999, GSI Technology


Similar Part No. - GS8162Z72C

ManufacturerPart #DatasheetDescription
logo
GSI Technology
GS8162Z72C-133 GSI-GS8162Z72C-133 Datasheet
1Mb / 38P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72C-133I GSI-GS8162Z72C-133I Datasheet
1Mb / 38P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72C-150 GSI-GS8162Z72C-150 Datasheet
1Mb / 38P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72C-150I GSI-GS8162Z72C-150I Datasheet
1Mb / 38P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72C-166 GSI-GS8162Z72C-166 Datasheet
1Mb / 38P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
More results

Similar Description - GS8162Z72C

ManufacturerPart #DatasheetDescription
logo
GSI Technology
GS8162Z18BB-V GSI-GS8162Z18BB-V Datasheet
1Mb / 33P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72CC-V GSI-GS8162Z72CC-V Datasheet
1Mb / 27P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18CT GSI-GS8160Z18CT Datasheet
575Kb / 23P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18 GSI-GS8161Z18 Datasheet
939Kb / 36P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18BT-V GSI-GS8160Z18BT-V Datasheet
916Kb / 22P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18T GSI-GS8160Z18T Datasheet
616Kb / 24P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160ZV18CT GSI-GS8160ZV18CT Datasheet
565Kb / 22P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18BT-V GSI-GS8161Z18BT-V Datasheet
1Mb / 35P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BB GSI-GS8162Z18BB Datasheet
1Mb / 34P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18B GSI-GS8161Z18B Datasheet
863Kb / 37P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com