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GS74104ATP-12I Datasheet(PDF) 2 Page - GSI Technology |
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GS74104ATP-12I Datasheet(HTML) 2 Page - GSI Technology |
2 / 11 page Memory Array Row Decoder Column Decoder Address Input Buffer Control I/O Buffer A0 CE WE OE DQ1 A19 DQ4 GS74104ATP/J Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.06 6/2006 2/11 © 2001, GSI Technology Block Diagram Truth Table CE OE WE DQ1 to DQ8 VDD Current H X X Not Selected ISB1, ISB2 L L H Read IDD L X L Write L H H High Z Note: X: “H” or “L” |
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