8 / 18 page
CY7C4421/4201/4211/4221
CY7C4231/4241/4251
Document #: 38-06016 Rev. *A
Page 8 of 18
tDH
Data Hold Time
0.5
1
1
ns
tENS
Enable Set-up Time
3
4
6
ns
tENH
Enable Hold Time
0.5
1
1
ns
tRS
Reset Pulse Width[12]
10
15
25
ns
tRSS
Reset Set-up Time
8
10
15
ns
tRSR
Reset Recovery Time
8
10
15
ns
tRSF
Reset to Flag and Output Time
10
15
25
ns
tOLZ
Output Enable to Output in Low-Z[13]
0
0
0
ns
tOE
Output Enable to Output Valid
3
7
3
8
3
12
ns
tOHZ
Output Enable to Output in High-Z[13]
3
7
3
8
3
12
ns
tWFF
Write Clock to Full Flag
8
10
15
ns
tREF
Read Clock to Empty Flag
8
10
15
ns
tPAF
Clock to Programmable Almost-Full Flag
8
10
15
ns
tPAE
Clock to Programmable Almost-Full Flag
8
10
15
ns
tSKEW1
Skew Time between Read Clock and Write Clock
for Empty Flag and Full Flag
5
6
10
ns
tSKEW2
Skew Time between Read Clock and Write Clock
for Almost-Empty Flag and Almost-Full Flag
10
15
18
ns
Switching Characteristics Over the Operating Range
Parameter
Description
-10
-15
-25
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Switching Waveforms
Notes:
12. Pulse widths less than minimum values are not allowed.
13. Values guaranteed by design, not currently tested.
Write Cycle Timing
tCLKH
tCLKL
NO OPERATION
tDS
tSKEW1
tENS
WEN1
tCLK
tDH
tWFF
tWFF
tENH
WCLK
D0 –D8
FF
REN1,REN2
RCLK
NO OPERATION
WEN2
(if applicable)
[14]
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