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CY7C4425/4205/4215
CY7C4225/4235/4245
5
Notes:
7.
Tested initially and after any design or process changes that may affect these parameters.
8.
CL = 30 pF for all AC parameters except for tOHZ.
9.
CL = 5 pF for tOHZ.
Capacitance[7]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
5
pF
COUT
Output Capacitance
7
pF
AC Test Loads and Waveforms[8, 9]
3.0V
5V
OUTPUT
R11.1K
Ω
R2
680
Ω
CL
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
<3 ns
<3 ns
OUTPUT
1.91V
Equivalent to:
THÉ
EVENIN
EQUIVALENT
42X5–4
410
Ω
ALL INPUT PULSES
42X5–5
Switching Characteristics Over the Operating Range
Parameter
Description
7C42X5-10
7C42X5-15
7C42X5-25
7C42X5-35
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tS
Clock Cycle Frequency
100
66.7
40
28.6
MHz
tA
Data Access Time
2
8
2
10
2
15
2
20
ns
tCLK
Clock Cycle Time
10
15
25
35
ns
tCLKH
Clock HIGH Time
4.5
6
10
14
ns
tCLKL
Clock LOW Time
4.5
6
10
14
ns
tDS
Data Set-Up Time
3
4
6
7
ns
tDH
Data Hold Time
0.5
1
1
2
ns
tENS
Enable Set-Up Time
3
4
6
7
ns
tENH
Enable Hold Time
0.5
1
1
2
ns
tRS
Reset Pulse Width[10]
10
15
25
35
ns
tRSR
Reset Recovery Time
8
10
15
20
ns
tRSF
Reset to Flag and Output Time
10
15
25
35
ns
tPRT
Retransmit Pulse Width
12
15
25
35
ns
tRTR
Retransmit Recovery Time
12
15
25
35
ns
tOLZ
Output Enable to Output in Low Z[11]
0
0
0
0
ns
tOE
Output Enable to Output Valid
3
7
3
8
3
12
3
15
ns
tOHZ
Output Enable to Output in High Z[12]
3
7
3
8
3
12
3
15
ns
tWFF
Write Clock to Full Flag
8
10
15
20
ns
tREF
Read Clock to Empty Flag
8
10
15
20
ns
tPAFasynch
Clock to Programmable Almost-Full Flag[12]
(Asynchronous mode, VCC/SMODE tied to VCC)
12
16
20
25
ns