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UL62H256ASK35 Datasheet(PDF) 1 Page - Zentrum Mikroelektronik Dresden AG |
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UL62H256ASK35 Datasheet(HTML) 1 Page - Zentrum Mikroelektronik Dresden AG |
1 / 10 page 1 May 07, 2004 UL62H256A ! 32768 x 8 bit static CMOS RAM ! 35 and 55 ns Access Time ! Common data inputs and data outputs ! Three-state outputs ! Typ. operating supply current 35 ns: 45 mA 55 ns: 30 mA ! Standby current < 40 µA at 125 °C ! TTL/CMOS-compatible ! Power supply voltage 2.5 - 3.6 V ! Operating temperature range -40 °C to 85 °C -40 °C to 125 °C ! QS 9000 Quality Standard ! ESD protection > 2000 V (MIL STD 883C M3015.7) ! Latch-up immunity >100 mA ! Package: SOP28 (300/330 mil) The UL62H256A is a static RAM manufactured using a CMOS pro- cess technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-Transistor cell. The circuit is activated by the fal- ling edge of E. The address and control inputs open simultaneously. According to the information of W and G, the data inputs, or outputs, are active. In a Read cycle, the data outputs are activated by the falling edge of G, afterwards the data word will be available at the outputs DQ0-DQ7. After the address change, the data outputs go High-Z until the new information is available. The data outputs have no preferred state. The Read cycle is finished by the falling edge of W, or by the rising edge of E, respec- tively. Data retention is guaranteed down to 2 V. With the exception of E, all inputs consist of NOR gates, so that no pull-up/pull-down resistors are required. Low Voltage Automotive Fast 32K x 8 SRAM Pin Configuration Top View Signal Name Signal Description A0 - A14 Address Inputs DQ0 - DQ7 Data In/Out E Chip Enable G Output Enable W Write Enable VCC Power Supply Voltage VSS Ground Pin Description 1 A14 VCC 28 2 A12 W 27 4 A6 A8 25 5 A5 A9 24 3 A7 A13 26 6 A4 A11 23 7 A3 G 22 8 A2 A10 21 12 DQ1 DQ5 17 9 A1 E 20 10 A0 DQ7 19 11 DQ0 DQ6 18 13 DQ2 DQ4 16 14 VSS DQ3 15 SOP Features Description |
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