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ZMD31020BIC Datasheet(PDF) 9 Page - Zentrum Mikroelektronik Dresden AG

Part # ZMD31020BIC
Description  Sensor Signal Conditioner
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Manufacturer  ZMD [Zentrum Mikroelektronik Dresden AG]
Direct Link  http://www.zmdi.com
Logo ZMD - Zentrum Mikroelektronik Dresden AG

ZMD31020BIC Datasheet(HTML) 9 Page - Zentrum Mikroelektronik Dresden AG

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Copyright © 2004, ZMD AG, Rev. 1.6, 2005-05-19
9/19
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior
written consent of the copyright owner. The Information furnished in this publication is preliminary and subject to changes without notice.
ZMD31020
Sensor Signal Conditioner
Datasheet
ZMD31020 complies with the following protocol (for data communication timing details see parameter section):
Bus not busy: During idle periods both data line (SDA) and clock line (SCL) remain HIGH.
START condition (S): HIGH to LOW transition of SDA line while clock (SCL) is HIGH is interpreted as
START condition. All commands must be preceded by START condition. Master can generate START
condition at any time. More than one command can be transmitted without generation of intermediate STOP
condition.
STOP condition (P): LOW to HIGH transition of SDA line while clock (SCL) is HIGH determines STOP
condition. All command sequences must be ended with STOP condition.
Data valid (D): State of data line represents valid data when, after START condition, data line is stable for
duration of HIGH period of clock signal. Data on line must be changed during LOW period of clock signal.
There is one clock pulse per bit of data.
Acknowledge (A): Data is transferred in pieces of 8 bits (1 byte) on serial bus, MSB first. After each byte
receiving device – whether master or slave – is obliged to pull data line LOW as acknowledge for reception
of data. Master must generate an extra clock pulse for this purpose. When acknowledge is missed, slave
transmitter becomes inactive. It is on master either to send last command again or to generate STOP
condition in that case.
Slave address: Each device connected to bus has unique slave address. After generating START
condition, master transmits address consisting of 7-bit slave address and R/W - bit. Addressed slave
responds with acknowledge while other slaves on bus become inactive and ignore following data bytes.
R/W – bit determines direction of data transfer. If R/W is “0”, data is transmitted from master to slave (write
operation). If R/W is “1”, (read operation) data is transmitted from slave to master. Slave address of the IC is
hard coded to value 1111000xb.
Write operation: When writing to IC, slave address + R/W - bit (F0h) is followed by command byte and –
depending on command – optionally 2 data bytes. Calibration microcontroller reads command byte and
executes specific program for each command. Commands available are described below.
Read operation: When R/W – bit is set to “1” (F1h), IC sends 2 data bytes containing contents of output
register of serial interface. To read specific data, master must send special commands before reading which
instruct calibration microcontroller to place requested data in serial interface output register.


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