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74ALVT16731DGG Datasheet(PDF) 8 Page - NXP Semiconductors |
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74ALVT16731DGG Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 12 page Philips Semiconductors Product specification 74ALVT16731 2.5V/3.3V 1-to-4 address register/driver (3-State) 1999 Mar 30 8 1. All typical values are at VCC = 2.5V and Tamb = 25°C. AC SETUP REQUIREMENTS (2.5V "0.2V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V ±0.2V UNIT MIN TYP1 ts(H) ts(L) Setup time, High or Low Ax to CLK 4 2.4 2.3 0.9 0.8 ns th(H) th(L) Hold time, High or Low Ax to CLK 4 0 0 –0.7 –0.6 ns tw(H) tw(L) Pulse width, High or Low CLK 3 1.5 1.5 ns NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25°C. AC WAVEFORMS NOTES: 1. VM = 1.5V at VCC w 3.0V, VM = VCC/2 at VCC v 2.7V 2. VX = VOL + 0.3V at VCC w 3.0V, VX = VOL + 0.150V at VCC v 2.7V 3. VY = VOH – 0.3V at VCC w 3.0V, VY = VOH – 0.150V at VCC v 2.7V VOL tPLH VOH 0V tPHL 3.0V or VCC, whichever is less SW00276 SEL nAx nYx Waveform 1. Input (Ax) to Output (nYx) Propagation Delay, transparent mode. SEL to Output (nYx) Propagation Delay nOE INPUT VM VM tPZH tPHZ nYx OUTPUT VOH VM VM nYx OUTPUT VOL tPZL tPLZ 0V VX VY 3.0V or VCC whichever is less 0V SW00204 Waveform 2. 3-State Output Enable and Disable Times tPHL tPLH VOH tW(L) 1/fMAX CLK nYx tW(H) VOL 3.0V or VCC, whichever is less 0V SW00277 Waveform 3. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 0V Ax CLK tS(H) th(H) tS(L) th(L) 0V 3.0V or VCC, whichever is less 3.0V or VCC, whichever is less SW00278 Waveform 4. Data Setup and Hold Times |
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