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IDT70V16S15J Datasheet(PDF) 6 Page - Integrated Device Technology |
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IDT70V16S15J Datasheet(HTML) 6 Page - Integrated Device Technology |
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6 / 18 page  6.42 IDT70V16/5S/L High-Speed 3.3V 16/8K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 6 PRELIMINARYPRE PRELIMINARY DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1) (VDD = 3.3V ± 0.3V) 70V16/5X15 Com'l Only 70V16/5X20 Com'l & Ind 70V16/5X25 Com'l Only Symbol Parameter Test Condition Version Typ. (2) Max. Typ. (2) Max. Typ. (2) Max. Unit IDD Dynamic Operating Current (Both Ports Active) CE = VIL, Outputs Disabled SEM = VIH f = fMAX (3) COM'L S L 150 140 215 185 140 130 200 175 130 125 190 165 mA IND S L ____ ____ ____ ____ 140 130 225 195 ____ ____ ____ ____ ISB1 Standby Current (Both Ports - TTL Level Inputs) CER and CEL = VIH SEMR = SEML = VIH f = fMAX (3) COM'L S L 25 20 35 30 20 15 30 25 16 13 30 25 mA MIL & IND S L ____ ____ ____ ____ 20 15 45 40 ____ ____ ____ ____ ISB2 Standby Current (One Port - TTL Level Inputs) CE"A" = VIL and CE"B" = VIH(5) Active Port Outputs Disabled, f=fMAX (3) SEMR = SEML = VIH COM'L S L 85 80 120 110 80 75 110 100 75 72 110 95 mA MIL & IND S L ____ ____ ____ ____ 80 75 130 115 ____ ____ ____ ____ ISB3 Full Standby Current (Both Ports - CMOS Level Inputs) Both Ports CEL and CER > VDD - 0.2V, VIN > VDD - 0.2V or VIN < 0.2V, f = 0 (4) SEMR = SEML > VDD - 0.2V COM'L S L 1.0 0.2 5 2.5 1.0 0.2 5 2.5 1.0 0.2 5 2.5 mA MIL & IND S L ____ ____ ____ ____ 1.0 0.2 15 5 ____ ____ ____ ____ ISB4 Full Standby Current (One Port - CMOS Level Inputs) CE"A" < 0.2V and CE"B" > VDD - 0.2V(5) SEMR = SEML > VDD - 0.2V VIN > VDD - 0.2V or VIN < 0.2V Active Port Outputs Disabled, f = fMAX (3) COM'L S L 85 80 125 105 80 75 115 100 75 70 105 90 mA MIL & IND S L ____ ____ ____ ____ 80 75 130 115 ____ ____ ____ ____ 5669 tbl 09 Timing of Power-Up / Power-Down CE 5669 drw 07 tPU ICC ISB tPD 50% 50% , NOTES: 1. 'X' in part number indicates power rating (S or L) 2. VDD = 3.3V, TA = +25°C, and are not production tested. IDD DC = 115mA (typ.) 3. At f = fMAX , address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V. 4. f = 0 means no address or control lines change. 5. Port "A" may be either left or right port. Port "B" is the opposite from port "A". Output Loads and AC Test Conditions 5669 drw 04 590 Ω 30pF 435 Ω 3.3V DATAOUT BUSY INT 590 Ω 5pF* 435 Ω 3.3V DATAOUT , Figure 1. AC Output Test Load Figure 2. Output Test Load (for tLZ, tHZ, tWZ, tOW) *Including scope and jig. Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 3ns Max. 1.5V 1.5V Figures 1 and 2 5669 tbl 10 |
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