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IDT70V16L25J Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT70V16L25J Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 18 page 6.42 IDT70V16/5S/L High-Speed 3.3V 16/8K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 4 PRELIMINARYPRE PRELIMINARY Truth Table II: Semaphore Read/Write Control(1) Truth Table I: Non-Contention Read/Write Control NOTE: 1. There are eight semaphore flags written to via I/O0 and read from all I/Os (I/O0-I/O8). These eight semaphores are addressed by A0 - A2. NOTE: 1. Condition: A0L — A13L ≠ A0R — A13R Inputs (1) Outputs Mode CE R/ W OE SEM I/O0-8 H X X H High-Z Deselcted: Power-Down LL X H DATAIN Write to Memory LH LH DATAOUT Read Memory X X H X High-Z Outputs Disabled 5669 tbl 02 Inputs Outputs Mode CE R/ W OE SEM I/O0-8 HH L L DATAOUT Read Semaphore Flag Data Out (I/O0 - I/O8) H ↑ XL DATAIN Write I/O0 into Semaphore Flag LX X L ____ Not Allowed 5669 tbl 03 Pin Names Left Port Right Port Names CEL CER Chip Enable R/WL R/WR Read/Write Enable OEL OER Output Enable A0L - A13L(1) A0R - A13R(1) Address I/O0L - I/O8L I/O0R - I/O8R Data Input/Output SEML SEMR Semaphore Enable INTL INTR Interrupt Flag BUSYL BUSYR Busy Flag M/S Master or Slave Select VCC Power (3.3V) GND Ground (0V) 5669 tbl 01 NOTE: 1. A13 is a NC for IDT70V15. |
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