2

Integrated Circuit Solution Inc.

LPSR017-0A 09/13/2001

IC62LV1024AL

IC62LV1024ALL

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

DESCRIPTION

The

and low Vcc,131,072-word by 8-bit CMOS static RAMs. They

are fabricated using

This highly reliable process coupled with innovative circuit

design techniques, yields higher performance and low power

consumption devices.

When

CE1 is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation can

be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable

inputs,

CE1 and CE2. The active LOW Write Enable (WE)

controls both writing and reading of the memory.

The IC62LV1024AL and IC62LV1024ALL are available in 32-pin

8*20mm TSOP-1, 8*13.4mm TSOP-1, 450mil SOP and 48-pin

6*8mm TF-BGA.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

CE1

OE

WE

512 X 2048

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VCC

I/O

DATA

CIRCUIT

I/O0-I/O7

CE2

128K x 8 LOW POWER and LOW Vcc

CMOS STATIC RAM

FEATURES

• Access times of 45, 55, and 70 ns

• Low active power: 60 mW (typical)

• Low standby power: 15 µW (typical) CMOS

standby

• Low data retention voltage: 2V (min.)

• Available in Low Power (-L) and

Ultra Low Power (-LL)

• Output Enable (

OE) and two Chip Enable

(

CE1 and CE2) inputs for ease in applications

• TTL compatible inputs and outputs

• Single 2.7V to 3.3V power supply