Philips Semiconductors

Product specification

74F112

Dual J-K negative edge-triggered flip-flop

February 9, 1990

6

VM

CPn

Qn

VM

VM

Qn

tPHL

tPLH

SDn

VM

VM

tw(L)

SF00108

Jn, Kn

tREC

Waveform 2.

Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock

VM

CPn

Qn

VM

VM

Qn

tPLH

tPHL

RDn

VM

VM

tw(L)

SF00109

Jn, Kn

tREC

Waveform 3.

Propagation Delay for Reset to Output, Reset Pulse Width, and Recovery Time for Reset to Clock