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IS45S32200C1-7TA1 Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc

Part # IS45S32200C1-7TA1
Description  512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS45S32200C1-7TA1 Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. B
05/18/06
IS45S32200C1
ISSI®
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice.
ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
FEATURES
• Clock frequency: 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length:
(1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Self refresh modes
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable
CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Automotive Temperature Grade
Option A: 0oC to +70oC
Option A1: -40oC to +85oC
• Package 400-mil 86-pin TSOP II and 90-ball BGA
• Lead free package is available
OVERVIEW
ISSI's 64Mb Synchronous DRAM IS45S32200C1 is
organized as 524,288 bits x 32-bit x 4-bank for improved
performance. The synchronous DRAMs achieve high-
speed data transfer using pipeline architecture. All inputs
and outputs signals refer to the rising edge of the clock
input.
512K Bits x 32 Bits x 4 Banks (64-MBIT)
SYNCHRONOUS DYNAMIC RAM
JULY 2006
KEY TIMING PARAMETERS
Parameter
-7
Unit
Clk Cycle Time
CAS Latency = 3
7
ns
CAS Latency = 2
10
ns
Clk Frequency
CAS Latency = 3
143
Mhz
CAS Latency = 2
100
Mhz
Access Time from Clock
CAS Latency = 3
5.5
ns
CAS Latency = 2
8
ns


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