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S5T8610 Datasheet(PDF) 4 Page - Samsung semiconductor |
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S5T8610 Datasheet(HTML) 4 Page - Samsung semiconductor |
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4 / 27 page  S5T8610 DIGITAL CLP MODEM WITH ADPCM CODEC 4 PRELIMINARY PIN DESCRIPTION Pin No Symbol I/O Description 1 VREF AI Reference top (3.3V) for ADC 2 AGND AI Reference bottom (0V) for ADC 3 VDDA_ADC AP Analog power (3.3V) for ADC 4 VSSA_ADC AG Analog ground (0V) for ADC 5 RXI AI Analog input (input range: 0V to 3.3V) for ADC 6 VRT AI Voltage reference top (2.0V) for DAC 7 VRB AI Voltage reference bottom (0V) for DAC 8 TXO AO Analog voltage output for DAC 9 VDDA_DAC AP Analog power (3.3V) for DAC 10 VSSA_DAC AG Analog ground (0V) for DAC 11 VDDD_DAC DP Digital power (3.3V) for DAC 12 VSSD_DAC DG Digital ground (0V) for DAC 13 VDDD1 DP Digital power (3.3V) for DSP core 14 TCLKDR DI Test clock 15 TSHFTDR DI Test scan shift enable 16 TUPDDR DI Test scan update 17 TSELDR0 DI Test scan register selection 0 18 TSELDR1 DI Test scan register selection 1 19 TIDR DI Test scan input 20 TODR DO Test scan output 21 TINT DO Interrupt check 22 CKOUT DO Test clock output 23 VDDD_OSC DP Digital power (3.3V) for oscillator block 24 OSCI I Oscillator input 25 OSCO O Oscillator output 26 VSSD_OSC DG Digital ground (0V) for oscillator block 27 TEST0 DI Test 28 TEST1 DI Test 29 TEST2 DI Test 30 TEST3 DI Test 31 SYNCH/BER/JAM DO Initial synchronization / BER (bit error rate) / jamming detection output 32 VSSD1 DG Digital ground (0V) |
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