7

Rev. B

11/08/05

IS64WV6416BLL

IS61WV6416BLL

-12 ns

-15 ns

Symbol

Parameter

Min. Max.

Min. Max.

Unit

Read Cycle Time

12

—

15

—

ns

Address Access Time

—

12

—

15

ns

Output Hold Time

3

—

3

—

ns

CE Access Time

—

12

—

15

ns

OE Access Time

—

6

—

7

ns

OE to High-Z Output

—

6

0

6

ns

OE to Low-Z Output

0

—

0

—

ns

CE to High-Z Output

0

6

0

6

ns

CE to Low-Z Output

3

—

3

—

ns

LB, UB Access Time

—

6

—

7

ns

LB, UB to High-Z Output

0

6

0

6

ns

LB, UB to Low-Z Output

0

—

0

—

ns

Notes:

1. Test conditions assume signal transition times of 1.5 ns or less, timing reference levels of 1.25V, input pulse levels of 0V to

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.