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IS62U6416LL-20BI Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS62U6416LL-20BI Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 9 page IS62U6416LL Integrated Silicon Solution, Inc. — 1-800-379-4774 1 ADVANCE INFORMATION SR034-0C 12/09/98 1 2 3 4 5 6 7 8 9 10 11 12 ISSI® FEATURES • Access time: 200 ns • CMOS low power operation – 40 mW (typical) operating – 90 µW (typical) standby • TTL compatible interface levels • Single 1.8V-2.7V power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available • Available in Jedec Std 44-pin SOJ package, 44-pin TSOP (Type II), and 48-pin mini BGA IS62U6416LL 64K x 16 LOW VOLTAGE, ULTRA-LOW POWER CMOS STATIC RAM DESCRIPTION The ISSI IS62U6416LL is an ultra-low power, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques yields access times as fast as 200 ns with low power consumption. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable ( WE) controls both writing and reading of the memory. A data byte allows Upper Byte ( UB) and Lower Byte (LB) access. FUNCTIONAL BLOCK DIAGRAM ADVANCE INFORMATION DECEMBER 1998 The specification contains ADVANCE INFORMATION. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc. A0-A15 CE OE WE 64K x 16 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VCC I/O DATA CIRCUIT I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte UB LB ISSI® |
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