1

Rev. B

05/10/06

Copyright © 2006 Integrated Silicon Solution, Inc.

All rights reserved.

ISSI reserves the right to make changes to this specification and its products at any time

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

IS63WV1024BLL

IS64WV1024BLL

128K x 8 HIGH-SPEED CMOS STATIC RAM

FEATURES

• High-speed access time:

12 ns: 3.3V + 10%

15 ns: 2.5V – 3.6V

• High-performance, low-power CMOS process

• CMOS Low Power Operation

50 mW (typical) operating current

• Multiple center power and ground pins for

greater noise immunity

• Fully static operation: no clock or refresh

required

• TTL compatible inputs and outputs

• Packages available:

– 32-pin TSOP (Type II)

– 32-pin sTSOP (Type I)

– 48-Ball miniBGA (6mm x 8mm)

– 32-pin 300-mil SOJ

• Lead-free available

DESCRIPTION

The

power, 131,072-word by 8-bit CMOS static RAM. The

IS63/64WV1024BLL is fabricated using

high-performance CMOS technology. This highly reliable

process coupled with innovative circuit design

techniques, yields higher performance and low power

consumption devices.

When

CE is HIGH (deselected), the device assumes a

standby mode at which the power dissipation can be

reduced down to 25 µW (typical) with CMOS input levels.

power supply. The IS63/64WV1024BLL is available in

32-pin TSOP (Type II), 32-pin sTSOP (Type I), 48-Ball

miniBGA (6mm x 8mm), and 32-pin SOJ (300-mil)

packages.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

CE

OE

WE

128K X 8

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VDD

I/O

DATA

CIRCUIT

I/O0-I/O7

MAY 2006