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N74F193D Datasheet(PDF) 7 Page - NXP Semiconductors |
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N74F193D Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 12 page Philips Semiconductors Product specification 74F193 Up/down binary counter with separate up/down clocks 1995 Jul 17 7 AC WAVEFORMS For all waveforms Vm = 1.5V VM tPLH tPHL VM VM VM CPU, CPD Qn 1/fMAX tW(L) SF00750 tW(H) Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency trec VM VM VM PL tW(L) VM VM VM tPLH tPHL CPU, CPD VM TCU, TCD, Qn SF00751 Waveform 3. Parallel Pulse Width, Parallel Load to Output Delays, and Parallel Load to Clock Recovery Time VM VM VM VM tPLH MR tW(H) trec VM tPHL CPU, CPD Qn, TCD TCU SF00752 Waveform 5. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time VM VM VM VM tPLH tPHL CPU, CPD TCU, TCD SF00753 Waveform 2. Propagation Delay, Clock to Terminal Count VM VM VM tPHL tPLH VM tPHL tPLH VM VM Dn Qn, TCU, TCD Qn, TCU, TCD SF00754 Waveform 4. Propagation Delay, Data to Flip-Flop Outputs, Terminal Count Up and Down Outputs VM VM Dn PL tS(H) th(H) tS(L) th(L) VM SF00755 The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 6. Data Setup and Hold Times |
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