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MIC5320-PPYD6 Datasheet(PDF) 10 Page - Micrel Semiconductor

Part # MIC5320-PPYD6
Description  Dual, High Performance 150mA uCap ULDO
Download  13 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC5320-PPYD6 Datasheet(HTML) 10 Page - Micrel Semiconductor

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Micrel, Inc.
MIC5320
July 2006
10
M9999-073106
Applications Information
Enable/Shutdown
The MIC5320 comes with dual active-high enable pins
that
allow
each
regulator
to
be
disabled
independently. Forcing the enable pin low disables the
regulator and sends it into a “zero” off-mode-current
state. In this state, current consumed by the regulator
goes nearly to zero. Forcing the enable pin high
enables the output voltage. The active-high enable pin
uses CMOS technology and the enable pin cannot be
left floating; a floating enable pin may cause an
indeterminate state on the output.
Input Capacitor
The MIC5320 is a high-performance, high bandwidth
device. Therefore, it requires a well-bypassed input
supply for optimal performance. A 1µF capacitor is
required from the input to ground to provide stability.
Low-ESR
ceramic
capacitors
provide
optimal
performance at a minimum of space. Additional high-
frequency capacitors, such as small-valued NPO
dielectric-type
capacitors,
help
filter
out
high-
frequency noise and are good practice in any RF-
based circuit.
Output Capacitor
The MIC5320 requires an output capacitor of 1µF or
greater to maintain stability. The design is optimized
for use with low-ESR ceramic chip capacitors. High
ESR capacitors may cause high frequency oscillation.
The
output
capacitor
can
be
increased,
but
performance has been optimized for a 1µF ceramic
output capacitor and does not improve significantly
with larger capacitance.
X7R/X5R dielectric-type ceramic capacitors are
recommended
because
of
their
temperature
performance.
X7R-type
capacitors
change
capacitance by 15% over their operating temperature
range and are the most stable type of ceramic
capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% and 60%, respectively, over
their operating temperature ranges. To use a ceramic
chip capacitor with Y5V dielectric, the value must be
much higher than an X7R ceramic capacitor to ensure
the same minimum capacitance over the equivalent
operating temperature range.
No-Load Stability
Unlike many other voltage regulators, the MIC5320
will remain stable and in regulation with no load. This
is especially important in CMOS RAM keep-alive
applications.
Thermal Considerations
The MIC5320 is designed to provide 150mA of
continuous current for both outputs in a very small
package. Maximum ambient operating temperature
can be calculated based on the output current and the
voltage drop across the part. Given that the input
voltage is 3.3V, the output voltage is 2.8V for VOUT1,
1.5V for VOUT2 and the output current = 150mA. The
actual power dissipation of the regulator circuit can be
determined using the equation:
PD = (VIN – VOUT1) IOUT1 + (VIN – VOUT2) IOUT2+ VIN IGND
Because this device is CMOS and the ground current
is typically <150µA over the load range, the power
dissipation contributed by the ground current is < 1%
and can be ignored for this calculation.
PD = (3.3V – 2.8V) × 150mA + (3.3V -1.5) × 150mA
PD = 0.345W
To determine the maximum ambient operating
temperature of the package, use the junction-to-
ambient thermal resistance of the device and the
following basic equation:
PD(MAX) =
TJ(MAX) - TA
JA
TJ(max) = 125°C, the maximum junction temperature of
the die θJA thermal resistance = 100°C/W.
The table below shows junction-to-ambient thermal
resistance for the MIC5320 in different packages.
Package
θJA
Recommended
Minimum
Footprint
θJC
6-Pin 1.6x1.6 MLF
®
100°C/W
2°C/W
Thermal Resistance
Substituting PD for PD(max) and solving for the ambient
operating
temperature
will
give
the
maximum
operating conditions for the regulator circuit. The
junction-to-ambient
thermal
resistance
for
the
minimum footprint is 100°C/W.
The maximum power dissipation must not be
exceeded for proper operation.


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