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74F395 Datasheet(PDF) 5 Page - NXP Semiconductors |
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74F395 Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 7 page  Philips Semiconductors Product specification 74F395 4-bit cascadable shift register (3-State) 1990 Oct 23 5 AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER TEST CONDITION LIMITS UNIT SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX fMAX Maximum clock frequency Waveform 1 105 120 MHz tPLH tPHL Propagation delay CP to Qn Waveform 1 3.5 5.0 6.0 8.0 8.5 11.0 3.5 5.0 9.5 11.5 ns tPLH tPHL Propagation delay CP to Qs Waveform 1 4.5 5.5 6.0 7.5 8.5 10.0 4.0 5.0 9.5 10.5 ns tPHL Propagation delay MR to Qn Waveform 2 5.0 7.5 10.0 5.0 10.5 ns tPHL Propagation delay MR to Qs Waveform 2 4.5 7.0 9.0 4.5 9.5 ns tPZH tPZL Output Enable time to High or Low level Waveform 4 Waveform 5 4.0 3.5 6.5 6.0 9.0 8.0 4.0 3.5 10.0 8.5 ns tPHZ tPLZ Output Disable time from High or Low level Waveform 4 Waveform 5 1.0 1.0 2.5 3.5 4.5 5.5 1.0 1.0 5.5 6.5 ns AC SETUP REQUIREMENTS SYMBOL PARAMETER TEST CONDITION LIMITS UNIT SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX ts(H) ts(L) Setup time, High or Low Dn to CP Waveform 3 2.5 1.5 3.0 2.0 ns th(H) th(L) Hold time, High or Low Dn to CP Waveform 3 1.5 1.5 1.5 1.5 ns ts(H) ts(L) Setup time, High or Low PE to CP Waveform 3 6.5 6.0 7.0 6.5 ns th(H) th(L) Hold time, High or Low PE to CP Waveform 3 0 0 0 0 ns tW(H) tW(L) CP Pulse width High or Low Waveform 1 5.0 4.0 5.5 4.5 ns tW(L) MR Pulse width Low Waveform 2 2.5 3.0 ns tREC Recovery time MR to CP Waveform 2 6.0 7.0 ns |
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