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EM4069A6CI2LB Datasheet(PDF) 11 Page - EM Microelectronic - MARIN SA |
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EM4069A6CI2LB Datasheet(HTML) 11 Page - EM Microelectronic - MARIN SA |
11 / 15 page EM4069 EM4169 Copyright 2003, EM Microelectronic-Marin SA 11 www.emmicroelectronic.com The Write Configuration word command procedure is the same as above, the only exception is that only CRC verification and power check are done. Writing to EEPROM lasts 20 ms. After successful writing of EEPROM the IC sends an acknowledge pattern to confirm the completion of writing. Acknowledge pattern consists of switching the modulator load ON and OFF with a signal period of 256 µs (Option 64 clocks/bit) or 128 µs (Option 32 clocks/bit) representing half a bit period (a quarter of bit period ON, a quarter of bit period OFF). Acknowledge pattern is transmitted during a time equivalent to two bit periods. Pulses of this length do not occur during data readout so the acknowledge pattern is easily recognizable. tRDB tRDB Acknowledge pattern Fig. 13 After sending the acknowledge pattern the EM4069 transitions to the Start Bit Detection state and waits for the start bit of next command. In this way, several words can be written to EEPROM without returning in read mode after every write. The value of the timer is 2 tRDB. Disabling of Command Detection In certain cases the IC logic blocks the detection of the Synchronization pattern Envelope during one complete readout cycle of 128 bits. This is valid in the following cases : at power up (after POR) after a Reset command after a time out occurs in the Start Bit Detection state (only in the case the transition to Start Bit Detection state was done from Read mode) Details about command timing Command timing is based on NRZ (non-return to zero) modulation on the magnetic field (as shown in figure 11). NRZ modulation is simple and leads to good results in proximity of the reader. To send a bit-1, the reader does not modulate the signal for a complete bit period, and to send a bit-0, it modulates the carrier frequency during a whole bit period. Long streams of zeros (in write command data sequence or CRC) reduce writing distance due to drop of supply voltage under POR level, due to the long time the carrier frequency is in LOW field mode. The writing distance can be improved by using RTO (return to one) modulation coding. Short burst of high field (approximately 1/4 of bit period) during transmission of a bit-0 to EM4069, recharge the on-board power supply buffer capacitor. To operate in this way, it is important to be synchronized with the sampling rate of the EM4069. Figure 14 shows the processing of hexadecimal data “96” in the write command string. The following signals are drawn : EM4069 : shows the modulator state. The “low” peak to peak value indicates that the modulator load is connected, and a “high” peak to peak value means that the modulator load is disconnected. NRZ : Reader generated field. Low field is forced when sending a bit-0 and High field for a bit-1. The field is at the same level for the whole bit duration. RTO : Reader generated field as NRZ, with a burst of high field during 1/4 period for the transmission of a bit-0. At the beginning of timing diagram, the EM4069 is in start bit detection state, modulator load and peak detector are ON. When the start bit is detected, the logic transitions in command processing state. 3/8 to 1/2 of a bit period after beginning of start bit (T1), EM4069 starts putting the modulator load half bit period OFF and half bit period ON. The sample of field strength which gives to the logic the value of bit is taken at the end of ON period. Assuming that the start bit duration is 1 bit period, the following bit samples are taken 3/8 to 1/2 of bit period after start of each bit period. So during the last quarter of bit period the field can be put high to recharge the EM4069 on-board capacitor. The sampling point can be moved by changing the start bit duration. |
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