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EDI416S4030A12SI Datasheet(PDF) 1 Page - White Electronic Designs Corporation |
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EDI416S4030A12SI Datasheet(HTML) 1 Page - White Electronic Designs Corporation |
1 / 27 page EDI416S4030A 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs January, 2003 Rev. 2 White Electronic Designs Corp. reserves the right to change products or specifications without notice. 1Mx16 Bits x 4 Banks Synchronous DRAM FEATURES Single 3.3V power supply Fully Synchronous to positive Clock Edge Clock Frequency = 100, 83MHz SDRAM CAS Latentency = 3 (100MHz), 2 (83MHz) Burst Operation Sequential or Interleave Burst length = programmable 1,2,4,8 or full page Burst Read and Write Multiple Burst Read and Single Write DATA Mask Control per byte Auto Refresh (CBR) and Self Refresh 4096 refresh cycles across 64ms Automatic and Controlled Precharge Commands Suspend Mode and Power Down Mode Industrial Temperature Range The EDI416S4030A is 67,108,864 bits of synchronous high data rate DRAM organized as 4 x 1,048,576 words x 16 bits. Synchronous design allows precise cycle control with the use of system clock, I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Available in a 54 pin TSOP type II package the EDI416S4030A is tested over the industrial temp range (- 40C to +85C) providing a solution for rugged main memory applications. PIN DESCRIPTION A0-11 Address Inputs BA0, BA1 Bank Select Address CE# Chip Select WE# Write Enable CK Clock Input CKE Clock Enable DQ0-15 Data Input/Output L(U)DQM Data Input/Output Mask RAS# Row Address Strobe CAS# Column Address Strobe VCC Power (+3.3V ±10%) VCCQ Data Output Power VSS Ground VSSQ Data Output Ground NC No Connection DESCRIPTION FIG. 1 PIN CONFIGURATIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 VSS DQ15 VSSQ DQ14 DQ13 VCCQ DQ12 DQ11 VSSQ DQ10 DQ9 VCCQ DQ8 VSS NC/RFU UDQM CK CKE NC A11 A9 A8 A7 A6 A5 A4 VSS VCC DQ0 VCCQ DQ1 DQ2 VSSQ DQ3 DQ4 VCCQ DQ5 DQ6 VSSQ DQ7 VCC LDQM WE# CAS# RAS# CE# BA0 BA1 A10/AP A0 A1 A2 A3 VCC |
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