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EM6604WP11 Datasheet(PDF) 2 Page - EM Microelectronic - MARIN SA |
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EM6604WP11 Datasheet(HTML) 2 Page - EM Microelectronic - MARIN SA |
2 / 25 page EM6604 03.02 REV. D/440 Copyright 2002, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com EM6604 at a glance • Power Supply - Low Voltage, low power architecture - Switch between Vdd (output buffers supply) and VddCA (logic supply) - 1.2V ... 1.7V battery voltage - 1.7 µA in active mode typ. @ 1.5V, 25°C - 0.3 µA in standby mode @ 1.5V, 25°C - 32 kHz Oscillator • RAM - 72 x 4 bit, direct addressable • ROM - 1536 x 16 bit metal mask programmable • CPU - 4 bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions • Main Operating Modes and Resets - Active mode (CPU is running) - Standby mode (CPU in Halt) - Initial reset on Power-On (POR) - External reset pin - Watchdog timer (time-out) reset • 4-Bit Input PortA - Direct input read - Interrupt request on input’s rising or falling edge, selectable by metal mask. - Pull-up, Pull-down or none, selectable by metal mask - Software test variables for conditional jumps • 4-Bit Output PortB - High-current output buffers - min. 4.5mA at 0.15V voltage drop at Vdd=1.2V - differential motor driving capability (a motor with 180 =Ω between two pads of PortB is driven with at least 4.75mA • 4-Bit Input/Output PortC - separate input or output selection by metal mask - direct input read - Pull-up, Pull-down or none, selectable by metal mask if used as Input • Buzzer Output - separate buzzer output - 2kHz output or continuous High or Low • Prescaler - 15 stage system clock divider down to 1 Hz - 3 interrupt requests : 2Hz/8Hz/128Hz - Prescaler reset (from 8kHz to 1Hz) • 8-bit Timer - 8-bit auto-reload count-up timer - 4 timer clocks : 2Hz/8Hz/32Hz/256Hz - parallel load - interrupt request when comes to FF hex. • Supply Voltage Level Detector - Fixed level - 1.25V typical - Busy flag during measure - Active only on request to reduce power consumption • Interrupt Controller - 4 external interrupt sources from PortA - 2 internal interrupt sources, prescaler and timer - each interrupt request is individually maskable - interrupt request flag is cleared automatically on register read - general interrupt request to CPU can be disabled |
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