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W3DG6463V75D2-X Datasheet(PDF) 5 Page - White Electronic Designs Corporation |
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W3DG6463V75D2-X Datasheet(HTML) 5 Page - White Electronic Designs Corporation |
5 / 10 page July 2005 Rev. 2 W3DG6463V-D2 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PRELIMINARY White Electronic Designs Corp. reserves the right to change products or specifications without notice. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS VCC, VCCQ = +3.3V ±0.3V AC CHARACTERISTICS SYMBOL 7 7.5 10 UNITS NOTE PARAMETER MIN MAX MIN MAX MIN MAX Access timefrom CLK (pos.edge) CL = 3 tAC(3) 5.4 5.4 6 ns 27 CL = 2 tAC(2) 5.4 6 6 ns Address hold time tAH 0.8 0.8 1 ns Address setup time tAS 1.5 1.5 2 ns CLK high-level width tCH 2.5 2.5 3 ns CLK low-level width tCL 2.5 2.5 3 ns Clock cycle time CL = 3 tCK(3) 7 7.5 8 ns 23 CL = 2 tCK(2) 7.5 10 10 ns 23 CKE hold time tCKH 0.8 0.8 1 ns CKE setup time tCKS 1.5 1.5 2 ns CS#, RAS#, CAS#, WE#, DQM hold time tCMH 0.8 0.8 1 ns CS#, RAS#, CAS#, WE#, DQM setup time tCMS 1.5 1.5 2 ns Data-in hold time tDH 0.8 0.8 1 ns Data-in setup time tDS 1.5 1.5 2 ns Data-out high-impedance time CL = 3 tHZ(3) 5.4 5.4 6 ns 10 CL = 2 tHZ(2) 5.4 6 6 ns 10 Data-out low-impedance time tLZ 111 ns Data-out hold time (load) tOH 2.7 2.7 2.7 ns Data-out hold time (no load) tOHN 1.8 1.8 1.8 ns 28 ACTIVE to PRECHARGE command tRAS 37 120,000 44 120,000 50 120,000 ns ACTIVE to ACTIVE command period tRC 60 66 66 ns ACTIVE to READ or WRITE delay tRCD 15 20 20 ns Refresh period tREF 64 64 64 ms AUTOREFRESH period tRFC 66 66 66 ns PRECHARGE command period tRP 15 20 20 ns ACTIVE bank a to ACTIVE bank b command tRRD 14 15 15 ns Transition time tT 0.3 1.2 0.3 1.2 0.3 1.2 ns 7 WRITE recovery time tWR 1 CLK + 7ns 1 CLK + 7.5ns 1 CLK + 7.5ns 24 14 15 15 ns 25 Exit SELF REFRESH to ACTIVE command tXSR 67 75 80 ns 20 |
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