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White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

W332M64V-XBX

February 2005

Rev. 0

TRUTH TABLE - COMMANDS AND DQM OPERATION (NOTE 1)

NAME (FUNCTION)

CS#

RAS#

CAS#

WE#

DQM

ADDR

I/Os

COMMAND INHIBIT (NOP)

H

X

X

X

X

X

X

NO OPERATION (NOP)

L

H

H

H

X

X

X

ACTIVE (Select bank and activate row) ( 3)

L

L

H

H

X

Bank/Row

X

READ (Select bank and column, and start READ burst) (4)

L

H

L

H

Bank/Col

X

WRITE (Select bank and column, and start WRITE burst) (4)

L

H

L

L

Bank/Col

Valid

BURST TERMINATE

L

H

H

L

X

X

Active

PRECHARGE (Deactivate row in bank or banks) ( 5)

L

L

H

L

X

Code

X

AUTO REFRESH or SELF REFRESH (Enter self refresh mode) (6, 7)

L

L

L

H

X

X

X

LOAD MODE REGISTER (2)

L

L

L

L

X

Op-Code

X

Write Enable/Output Enable (8)

––––

L

–

Active

Write Inhibit/Output High-Z (8)

––––

H

–

High-Z

command can only be issued when all banks are idle, and

a subsequent executable command cannot be issued until

ACTIVE

The ACTIVE command is used to open (or activate) a

row in a particular bank for a subsequent access. The

value on the BA0, BA1 inputs selects the bank, and the

address provided on inputs A0-12 selects the row. This row

remains active (or open) for accesses until a PRECHARGE

command is issued to that bank. A PRECHARGE

command must be issued before opening a different row

in the same bank.

READ

The READ command is used to initiate a burst read

access to an active row. The value on the BA0, BA1 inputs

selects the bank, and the address provided on inputs A0-9

selects the starting column location. The value on input

A10 determines whether or not AUTO PRECHARGE is

used. If AUTO PRECHARGE is selected, the row being

accessed will be precharged at the end of the READ

burst; if AUTO PRECHARGE is not selected, the row will

remain open for subsequent accesses. Read data appears

on the I/Os subject to the logic level on the DQM inputs

COMMANDS

The Truth Table provides a quick reference of available

commands. This is followed by a written description of each

command. Three additional Truth Tables appear following

the Operation section; these tables provide current state/

next state information.

COMMAND INHIBIT

The COMMAND INHIBIT function prevents new commands

from being executed by the SDRAM, regardless of whether

the CLK signal is enabled. The SDRAM is effectively

deselected. Operations already in progress are not

affected.

NO OPERATION (NOP)

The NO OPERATION (NOP) command is used to perform

a NOP to an SDRAM which is selected (CS# is LOW).

This prevents unwanted commands from being registered

during idle or wait states. Operations already in progress

are not affected.

LOAD MODE REGISTER

The Mode Register is loaded via inputs A0-11 (A12

should be driven low). See Mode Register heading in the

Register Definition section. The LOAD MODE REGISTER

NOTES:

1.

CKE is HIGH for all commands shown except SELF REFRESH.

2.

A0-11 define the op-code written to the Mode Register and A12 should be driven

low.

3.

A0-12 provide row address, and BA0, BA1 determine which bank is made active.

4.

A0-9 provide column address; A10 HIGH enables the auto precharge feature

(nonpersistent), while A10 LOW disables the auto precharge feature; BA0, BA1

determine which bank is being read from or written to.

5.

A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks

precharged and BA0, BA1 are “Don’t Care.”

6.

This command is AUTO REFRESH if CKE is HIGH; SELF REFRESH if CKE is

LOW.

7.

Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t

Care” except for CKE.

8.

Activates or deactivates the I/Os during WRITEs (zero-clock delay) and READs

(two-clock delay).