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W78M32V120BI Datasheet(PDF) 5 Page - White Electronic Designs Corporation |
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W78M32V120BI Datasheet(HTML) 5 Page - White Electronic Designs Corporation |
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5 / 54 page  5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W78M32V-XBX April 2006 Rev. 3 White Electronic Designs Corp. reserves the right to change products or specifications without notice. equivalent to tPACC. When CS# is deasserted (CS#=VIH), the reassertion of CS# for subsequent access has access time of tACC or tCS. Here again, CS# selects the device and OE# is the output control and should be used to gate data to the output inputs if the device is selected. Fast page mode accesses are obtained by keeping A22–A3 constant and changing A2–A0 to select the specific word within that page. The device features an Unlock Bypass mode to facilitate faster programming. Once a bank enters the Unlock Bypass mode, only two write cycles are required to program a word, instead of four. The “Word Program Command Sequence” section has details on programming data to the device using both standard and Unlock Bypass command sequences. An erase operation can erase one sector, multiple sectors, or the entire device. Table 4 indicates the address space that each sector occupies. A “bank address” is the address bits required to uniquely select a bank. Similarly, a “sector address” refers to the address bits required to uniquely select a sector. The “Command Definitions” section has details on erasing a sector or the entire chip, or suspending/ resuming the erase operation. ICC2 in the DC Characteristics table represents the active current specification for the write mode. The AC Characteristics section contains timing specification tables and timing diagrams for write operations. Accelerated Program Operation The device offers accelerated program operations through the ACC function. This function is primarily intended to allow faster manufacturing throughput at the factory. If the system asserts VHH on this pin, the device automatically enters the mentioned Unlock Bypass mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the time required for program operations. The system would use a two-cycle program command sequence as required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin returns the device to normal operation. Note that VHH must not be asserted on WP#/ACC for operations other than accelerated programming, or device damage may result. In addition, the WP#/ACC pin should be raised to VCC when not in use. That is, the WP#/ACC pin should not be left floating or unconnected; inconsistent behavior of the device may result. Autoselect Functions If the system writes the autoselect command sequence, the device enters the autoselect mode. The system can then read autoselect codes from the internal register (which is separate from the memory array) on DQ63–DQ0. Standard read cycle timings apply in this mode. Refer to the Autoselect Mode and Autoselect Command Sequence sections for more information. TABLE 2. PAGE SELECT Word A2 A1 A0 Word 0 0 0 0 Word 1 0 0 1 Word 2 0 1 0 Word 3 0 1 1 Word 4 1 0 0 Word 5 1 0 1 Word 6 1 1 0 Word 7 1 1 1 SIMULTANEOUS OPERATION In addition to the conventional features (read, program, erase-suspend read, and erase-suspend program), the device is capable of reading data from one bank of memory while a program or erase operation is in progress in another bank of memory (simultaneous operation). The bank can be selected by bank addresses (A22–A20) with zero latency. The simultaneous operation can execute multi-function mode in the same bank. TABLE 3. BANK SELECT Bank A22-A20 Bank A 000 Bank B 001, 010, 011 Bank C 100, 101, 110 Bank D 111 WRITING COMMANDS/COMMAND SEQUENCES To write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive WE# and CS# to VIL, and OE# to VIH. |
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