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WED3C7558M350BI Datasheet(PDF) 1 Page - White Electronic Designs Corporation |
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WED3C7558M350BI Datasheet(HTML) 1 Page - White Electronic Designs Corporation |
1 / 13 page 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED3C7558M-XBX August 2002 Rev. 7 FEATURES Footprint compatible with WED3C750A8M-200BX Footprint compatible with Motorola MPC 745 RISC Microprocessor Multichip Package OVERVIEW The WEDC 755/SSRAM multichip package is targeted for high performance, space sensitive, low power systems and supports the following power management features: doze, nap, sleep and dynamic power management. The WED3C7558M-XBX multichip package consists of: 755 RISC processor Dedicated 1MB SSRAM L2 cache, configured as 128Kx72 21mmx25mm, 255 Ceramic Ball Grid Array (CBGA) Core Frequency/L2 Cache Frequency (300MHz/ 150MHz, 350MHz/175MHz) Maximum 60x Bus frequency = 66MHz The WED3C7558M-XBX is offered in Commercial (0°C to +70°C), industrial (-40°C to +85°C) and military (-55°C to +125°C) temperature ranges and is well suited for embedded applications such as missiles, aerospace, flight computers, fire control systems and rugged critical systems. * This product is subject to change without notice. FIGURE 1 – MULTI-CHIP PACKAGE DIAGRAM |
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