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WED7P256ATA7004I25 Datasheet(PDF) 8 Page - White Electronic Designs Corporation |
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WED7P256ATA7004I25 Datasheet(HTML) 8 Page - White Electronic Designs Corporation |
8 / 15 page 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxATA70xxI25 July 2005 Rev. 1 White Electronic Designs Corp. reserves the right to change products or specifications without notice. AC CHARACTERISTICS VCC = 3.3 V ± 5%, 5 V ± 0.5V, -40°C ≤ TA ≤ 85°C Attribute Memory Read AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tC Read cycle time 250 — ns tA Address access time — 250 tA CE# access time — 250 tA OE# access time — 125 tDIS Output disable time (CE#) — 100 tDIS Output disable time (OE#) — 100 tEN Output enable time (CE#) 5 — tEN Output enable time (OE#) 5 — tV Data valid time (A) 0 — tSU Address setup time 30 — Attribute Memory Write AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tC Write cycle time 250 — ns tW Write pulse time 150 — tSU Address setup time 30 — tSU Data setup time (-WE) 80 — tH Data hold time 30 — tREC Write recover time 30 — I/O Access Read AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tD Data delay after IORD# — 100 ns tH Data hold following IORD# 0 — tW IORD# pulse width 165 — tSUA Address setup before IORD# 70 — tHA Address hold following IORD# 20 — tSUCE CE# setup before IORD# 5 — tHCE CE# hold following IORD# 20 — tSUREG REG# setup before IORD# 5 — tHREG REG# hold following -IORD 0 — tDFINPACK INPACK# delay failing from IORD# 0 45 tDRINPACK INPACK# delay rising from IORD# — 45 tDFIOIS16 IOIS#16 delay failing from address — 35 tDRIOIS16 IOIS#16 delay rising from address — 35 |
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