WEDPZ512K72S-XBX

5

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

PRELIMINARY*

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

November 2003

Rev. 6

TRUTH TABLES

SYNCHRONOUS TRUTH TABLE

WRITE TRUTH TABLE

WE#

BW#a

BW#b

BW#c

BW#d

Operation

H

XXXX

Read

L

L

H

H

H

Write Byte a

L

H

L

H

H

Write Byte b

L

H

H

L

H

Write Byte c

L

H

H

H

L

Write Byte d

LLLLL

Write All Bytes

L

HHHH

Write Abort/NOP

CE#x

ADV

WE#

BW#x

OE#

CKE#

CLK

Address Accessed

Operation

H

L

X

X

X

L

↑

N/A

Deselect

X

H

X

X

X

L

↑

N/A

Continue Deselect

L

L

H

X

L

L

↑

External Address

Begin Burst Read Cycle

X

H

X

X

L

L

↑

Next Address

Continue Burst Read Cycle

L

L

H

X

H

L

↑

External Address

NOP/Dummy Read

X

H

X

X

H

L

↑

Next Address

Dummy Read

L

L

L

L

X

L

↑

External Address

Begin Burst Write Cycle

X

H

X

L

X

L

↑

Next Address

Continue Burst Write Cycle

L

L

L

H

X

L

↑

N/A

NOP/Write Abort

X

HXHX

L

↑

Next Address

Write Abort

X

X

X

X

X

H

↑

Current Address

Ignore Clock

NOTES:

1)

X means “Don’t Care.”

2)

The rising edge of clock is symbolized by ( ↑ ).

3)

A continue deselect cycle can only be entered if a deselect cycle is executed first.

4)

WRITE# = L means Write operation in WRITE TRUTH TABLE.

WRITE# = H means Read operation in WRITE TRUTH TABLE.

5)

Operation finally depends on status of asynchronous input pins (ZZ and OE#).

6)

CE#x refers to the combination of CS#1 and CS#2.

NOTES:

1)

X means “Don’t Care.”

2)

All inputs in this table must meet setup and hold time around the rising edge of CLK (↑ ).

3)

Replace BW#a with BW#e, BW#b, with BW#f, BW#c with BW#g and BW#d with BW#h for

operation of IC2.