WV3EG265M72EFSU-D4

6

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

May 2006

Rev. 0

ADVANCED

SYM

PARAMETER/CONDITION

MAX

UNITS

DDR333

@CL=2.5

DDR266

@CL=2

DDR266

@CL=2.5

DQ, DM and DQS inputs changing once per clock cycle; Address and control inputs changing

once every two clock cycles

1,270

1,180

1,180

mA

1,540

1,450

1,450

mA

PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle; Power-down

370

370

370

mA

DQS, and DM

820

820

820

mA

ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-down mode;

820

820

820

mA

other control inputs changing once per clock cycle

1,090

1,090

1,090

mA

OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One device bank active;

1,585

1,450

1,450

mA

OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank active;

inputs changing twice per clock cycle

1,675

1,495

1,495

mA

AUTO REFRESH BURST CURRENT:

3,970

3,790

3,790

mA

SELF REFRESH CURRENT: CKE ≤ 0.2V

370

370

370

mA

OPERATING CURRENT: Four device bank interleaving READs (Burst = 4) with auto

during Active READ, or WRITE commands

3,565

3,250

3,250

mA

**: Value calculated reflects all module ranks in this operating condition.