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DS2762BE Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # DS2762BE
Description  High-Precision Li Battery Monitor With Alerts
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS2762BE Datasheet(HTML) 9 Page - Maxim Integrated Products

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DS2762 High-Precision Li+ Battery Monitor With Alerts
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POWER MODES
The DS2762 has two power modes: active and sleep. While in active mode, the DS2762 continually measures
current, voltage, and temperature to provide data to the host system and to support current accumulation and Li+
safety monitoring. In sleep mode, the DS2762 ceases these activities. The DS2762 enters sleep mode when any of
the following conditions occurs:
§
The PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than 2s (pack
disconnection).
§
The voltage on VIN drops below undervoltage threshold VUV for tUVD (cell depletion).
§
The pack is disabled through the issuance of a SWAP command (SWEN bit = 1).
The DS2762 returns to active mode when any of the following occurs:
§
The PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high (pack
connection).
§
The
PS pin is pulled low (power switch).
§
The voltage on PLS becomes greater than the voltage on VIN (charger connection) with the SWEN bit set to 0.
§
The pack is enabled through the issuance of a SWAP command (SWEN bit = 1).
The DS2762 defaults to active mode when power is first applied.
Li+ PROTECTION CIRCUITRY
During active mode, the DS2762 constantly monitors cell voltage and current to protect the battery from overcharge
(overvoltage), overdischarge (undervoltage), and excessive charge and discharge currents (overcurrent, short
circuit). Conditions and DS2762 responses are described in the following sections and summarized in Table 1 and
Figure 3.
Table 1. Li+ Protection Conditions and DS2762 Responses
ACTIVATION
CONDITION
THRESHOLD
DELAY
RESPONSE
RELEASE THRESHOLD
Overvoltage
VIN > VOV
tOVD
CC high
VIN < VCE, or
VIS ≤ -2mV
Undervoltage
VIN < VUV
tUVD
CC, DC high,
Sleep Mode
VPLS > VDD
(1)
(charger connected)
Overcurrent, Charge
VIS > VOC
(2)
tOCD
CC, DC high
VPLS < VDD - VTP
(3)
Overcurrent, Discharge
VIS < -VOC
(2)
tOCD
DC high
VPLS > VDD - VTP
(4)
Short Circuit
VSNS > VSC
tSCD
DC high
VPLS > VDD - VTP
(4)
VIS = VIS1 - VIS2. Logic high = VPLS for CC and VDD for DC. All voltages are with respect to VSS. ISNS references current delivered from pin SNS.
Note 1:
If VDD < 2.2V, release is delayed until the recovery charge current (IRC) passed from PLS to VDD charges the battery and allows VDD
to exceed 2.2V.
Note 2:
For the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: ISNS > IOC for charge
direction and ISNS < -IOC for discharge direction.
Note 3:
With test current ITST flowing from PLS to VSS (pulldown on PLS).
Note 4:
With test current ITST flowing from VDD to PLS (pullup on PLS).
Overvoltage. If the cell voltage on VIN exceeds the overvoltage threshold, VOV, for a period longer than overvoltage
delay, tOVD, the DS2762 shuts off the external charge FET and sets the OV flag in the protection register. When the
cell voltage falls below charge enable threshold VCE, the DS2762 turns the charge FET back on (unless another
protection condition prevents it). Discharging remains enabled during overvoltage, and the DS2762 re-enables the
charge FET before VIN < VCE if a discharge current of -80mA (VIS ≤ -2mV) or less is detected.
Undervoltage. If the voltage of the cell drops below undervoltage threshold, VUV, for a period longer than
undervoltage delay, tUVD, the DS2762 shuts off the charge and discharge FETs, sets the UV flag in the protection


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