WV3HG2256M72AER-D6

ADVANCED

8

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

April 2006

Rev. 1

AC TIMING PARAMETERS (Continued)

AC Characteristics

806

665

534

403

Parameter

Symbol

Min

Max

Min

Max

Min

Max

Min

Max

Unit

DQS read preamble

TBD

TBD

0.4

0.6

0.4

0.6

0.4

0.6

DQS write preamble setup time

TBD

TBD

000

ps

DQS write preamble

TBD

TBD

0.35

0.35

0.35

DQS write postamble

TBD

TBD

0.4

0.6

0.4

0.6

0.4

0.6

Write command to first DQS latching

transition

TBD

TBD

WL-0.25

WL+0.25

WL-0.25

WL+0.25

WL-0.25

WL+0.25

Address and control input pulse width

for each input

TBD

TBD

0.6

0.6

0.6

Address and control input setup time

TBD

TBD

200

250

350

ps

Address and control input hold time

TBD

TBD

275

375

475

ps

CAS# to CAS# command delay

TBD

TBD

222

Active to Active (same bank) command

TBD

TBD

54

55

55

ns

Active bank a to Active b bank

command

TBD

TBD

7.5

7.5

7.5

ns

Active to Read or Write delay

TBD

TBD

15

15

15

ns

Four Bank Activate period

TBD

TBD

37.5

37.5

37.5

37.5

37.5

37.5

ns

Active to precharge command

TBD

TBD

39

70,000

40

70,000

40

70,000

ns

Internal Read to precharge command

delay

TBD

TBD

7.5

7.5

7.5

ns

Write recovery time

TBD

TBD

15

15

15

ns

Auto precharge write recovery and

precharge time

TBD

TBD

ns

Interval Write to Read command delay

TBD

TBD

7.5

7.5

10

ns

Precharge command period

TBD

TBD

15

15

15

ns

Precharge All command period

TBD

TBD

ns

Load Mode command cycle time

TBD

TBD

222

CKE low to CK,CK# uncertainty

TBD

TBD

+

+

+

ns

Note:

• AC specification is based on SAMSUNG components. Other DRAM manufactures specification may be different.

Continued on next page