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EM6625TQ52D Datasheet(PDF) 11 Page - EM Microelectronic - MARIN SA |
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EM6625TQ52D Datasheet(HTML) 11 Page - EM Microelectronic - MARIN SA |
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11 / 69 page  R EM6625 Copyright © 2005, EM Microelectronic-Marin SA 11 www.emmicroelectronic.com 5. Oscillator and Prescaler 5.1 Oscillator A built-in crystal oscillator generates the system operating clock for the CPU and peripheral blocks, from an externally connected crystal (typically 32.768kHz or 128kHz: selection done by metal option). The oscillator circuit is supplied by the regulated voltage, Vreg. In sleep mode the oscillator is stopped. EM’s special design techniques guarantee the low current consumption of this oscillator. The external impedance between the oscillator pads must be greater than 10MOhm. Connection of any other components to the two oscillator pads must be confirmed by EM Microelectronic-Marin SA. If the typical 128kHz option is selected, a special 4 stage frequency divider is added automatically by EM Microelectronics to deliver to the prescaler 32kHz which generates all system clocks except CPU clock frequency to keep the peripheral timing as close as possible to the specification. 5.2 Prescaler The prescaler consists of fifteen elements divider chain which delivers clock signals for the peripheral circuits such as timer/counter, buzzer, LCD voltage multiplier, debouncer and edge detectors, as well as generating prescaler interrupts. The input to the prescaler is the system clock signal. Power on initializes the prescaler to Hex(0001). Table 5.2.1 Prescaler Clock Name Definition Function Name 32 KHz Xtal Function Name 32 KHz Xtal System clock Ck[16] 32768 Hz System clock / 256 Ck[8] 128 Hz System clock / 2 Ck[15] 16384 Hz System clock / 512 Ck[7] 64 Hz System clock / 4 Ck[14] 8192 Hz System clock / 1024 Ck[6] 32 Hz System clock / 8 Ck[13] 4096 Hz System clock / 2048 Ck[5] 16 Hz System clock/ 16 Ck[12] 2048 Hz System clock / 4096 Ck[4] 8 Hz System clock / 32 Ck[11] 1024 Hz System clock / 8192 Ck[3] 4 Hz System clock / 64 Ck[10] 512 Hz System clock / 16384 Ck[2] 2 Hz System clock / 128 ck [9] 256 Hz System clock / 32768 Ck[1] 1 Hz Table 5.2.2 Control of Prescaler Register RegPresc Bit Name Reset R/W Description 3 PWMOn 0 R/W see 10 bit counter 2 ResPresc 0 R/W Write Reset prescaler 1 -> Resets the divider chain from Ck[14] down to Ck[2], sets Ck[1]. 0 -> No action. The Read value is always '0' 1 PrIntSel 0 R/W Interrupt select. 0 -> Interrupt from Ck[4] 1 -> Interrupt from Ck[6] 0 DebSel 0 R/W Debouncer clock select. 0 -> Debouncer with Ck[8] 1 -> Debouncer with Ck[11] or Ck[14] With DebSel = 1 one may choose either the Ck[11] or Ck[14] debouncer frequency by selecting the corresponding metal mask option. Relative to 32kHz the corresponding max. debouncer times are then 2 ms or 0.25 ms. For the metal mask selection refer to chapter 18.1.6. Switching the PrIntSel may generate an interrupt request. Avoid it with MaskIRQ32/8 = 0 selection during the switching operation. Figure 8. Prescaler Frequency Timing System Clock Ck[16] Ck[15] Ck[14] Horizontal Scale Change Ck[2] Ck[1] First positive edge of 1 Hz clock is 1s after the falling reset edge Prescaler Reset |
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