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WF512K32N-70H1C5A Datasheet(PDF) 1 Page - White Electronic Designs Corporation |
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WF512K32N-70H1C5A Datasheet(HTML) 1 Page - White Electronic Designs Corporation |
1 / 16 page 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WF512K32-XXX5 March 2006 Rev. 11 I/O8 I/O9 I/O10 A14 A16 A11 A0 A18 I/O0 I/O1 I/O2 WE2# CS2# GND I/O11 A10 A9 A15 VCC CS1# NC I/O3 I/O15 I/O14 I/O13 I/O12 OE# A17 WE1# I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A7 A12 NC A13 A8 I/O16 I/O17 I/O18 VCC CS4# WE4# I/O27 A4 A5 A6 WE3# CS3# GND I/O19 I/O31 I/O30 I/O29 I/O28 A1 A2 A3 I/O23 I/O22 I/O21 I/O20 11 22 33 44 55 66 1 12 23 34 45 56 FEATURES Access Times of 60, 70, 90, 120, 150ns Packaging • 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400(1)). • 68 lead, 40mm, Low Capacitance Hermetic CQFP (Package 501)1 • 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP (Package 502)1 • 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U) 3.5mm (0.140") high, (Package 510)1 • 68 lead, 22.4mm (0.880") CQFP (G2L) 5.08mm (0.200") high, Package (528) 1,000,000 Erase/Program Cycles Minimum Sector Architecture • 8 equal size sectors of 64KBytes each • Any combination of sectors can be concurrently erased. Also supports full chip erase Organized as 512Kx32 Pin Description Block Diagram FIGURE 1 – PIN CONFIGURATION FOR WF512K32N-XH1X5 512Kx32 5V FLASH MODULE, SMD 5962-94612 Top View WE1#CS1#CS2#CS3#CS4# WE4# WE3# WE2# 512K x 8 512K x 8 512K x 8 512K x 8 OE# A0-18 I/O0-7 I/O24-31 I/O16-23 I/O8-15 88 8 8 Commercial, Industrial and Military Temperature Ranges 5 Volt Programming. 5V ± 10% Supply. Low Power CMOS, 6.5mA Standby Embedded Erase and Program Algorithms TTL Compatible Inputs and CMOS Outputs Built-in Decoupling Caps for Low Noise Operation Page Program Operation and Internal Program Control Time Weight WF512K32 - XG2UX5 - 8 grams typical WF512K32N - XH1X5 - 13 grams typical WF512K32 - XG4TX51 - 20 grams typical WF512K32-XG2LX5 - 8 grams typical * This product is subject to change without notice. Note 1: Package Not Recommended for New Design See Flash Programming Application Note 4M5 for algorithms. I/O0-31 Data Inputs/Outputs A0-18 Address Inputs WE1-4# Write Enables CS1-4# Chip Selects OE# Output Enable VCC Power Supply GND Ground NC Not Connected |
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