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MC9S12T64MPK16 Datasheet(PDF) 11 Page - Motorola, Inc |
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MC9S12T64MPK16 Datasheet(HTML) 11 Page - Motorola, Inc |
11 / 608 page MC9S12T64Revision 1.1.1 MOTOROLA List of Figures 11 List of Figures Figure 1 MC9S12T64 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 2 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 3 Accumulator A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 4 Accumulator B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 5 Index Register X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 6 Index Register Y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 7 Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 8 Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 9 Condition Code Register (CCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 10 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 11 Pin Assignments in 80-pin LQFP for MC9S12T64 . . . . . . . . . . . . . . . . . 60 Figure 12 80-pin LQFP Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 13 Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Figure 14 Module Mapping Control Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 122 Figure 15 Module Mapping Control Register Summary . . . . . . . . . . . . . . . . . . . . 123 Figure 16 MC9S12T64 Memory map after reset . . . . . . . . . . . . . . . . . . . . . . . . . . 139 Figure 17 MEBI Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 Figure 18 Queue Status Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Figure 19 Resets and Interrupts Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Figure 20 VREG Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 Figure 21 LVD Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187 Figure 22 Flash 64K Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197 Figure 23 Flash Data Memory Map in Normal Modes . . . . . . . . . . . . . . . . . . . . . . 199 Figure 24 Flash Data Memory Map in Special Modes. . . . . . . . . . . . . . . . . . . . . . 201 Figure 25 Flash Control Register Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204 Figure 26 FADDR Address Mapping to Flash Relative Address . . . . . . . . . . . . . . 218 Figure 27 PRDIV8 and FDIV bits Determination Procedure . . . . . . . . . . . . . . . . . 222 Figure 28 Example Program Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 Figure 29 Example Program Algorithm in Flash Super User Mode. . . . . . . . . . . . 227 Figure 30 Flash Interrupt Implementation.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232 Figure 31 CALRAM 2K Byte Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238 Figure 32 CALRAM Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239 Figure 33 Copy Data from Flash EEPROM to CALRAM . . . . . . . . . . . . . . . . . . . . 244 Figure 34 Map CALRAM over Flash EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . 245 Figure 35 An Example Memory Map When Erase/Program Flash EEPROM . . . . 246 Figure 36 Remove CALRAM from memory mapping . . . . . . . . . . . . . . . . . . . . . . 247 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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