Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. A

11/18/99

IS41LV16400

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any

errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.

FEATURES

• Extended Data-Out (EDO) Page Mode access cycle

• TTL compatible inputs and outputs; tristate I/O

• Refresh Interval: 4,096 cycles / 64 ms

• Auto refresh Mode:

RAS-Only, CAS-before-RAS

(CBR), and Hidden

• Low Standby power dissipation:

– 1.8mW(max) CMOS Input Level

• Single power supply: 3.3V ± 10%

• Byte Write and Byte Read operation via two

CAS

DESCRIPTION

The ISSI IS41LV16400 is 4,194,304 x 16-bit high-perfor-

mance CMOS

Dynamic Random Access Memories.

These devices offer an accelerated cycle access called

EDO Page Mode. EDO Page Mode allows 1,024 random

accesses within a single row with access cycle time as

short as 20 ns per 16-bit word. The Byte Write control, of

upper and lower byte, makes the IS41LV16400 ideal for

use in 16-bit wide data bus systems.

These features make the S41LV16400 ideally suited for

high-bandwidth graphics, digital signal processing,

high-performance computing systems, and peripheral

applications.

The IS41LV16400 is packaged in a 50-pin TSOP (Type II).

JEDEC standard pinout.

4M x 16

(64-MBIT) DYNAMIC RAM

WITH EDO PAGE MODE

KEY TIMING PARAMETERS

Parameter

-50

-60

Unit

Max.

50

60

ns

Max.

13

15

ns

25

30

ns

20

25

ns

84

104

ns

NOVEMBER 1999

PIN CONFIGURATION

50-Pin TSOP (Type II)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

VCC

I/O0

I/O1

I/O2

I/O3

VCC

I/O4

I/O5

I/O6

I/O7

NC

VCC

W

RAS

NC

NC

NC

NC

A0

A1

A2

A3

A4

A5

VCC

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

NC

GND

LCAS

UCAS

OE

NC

NC

NC

A11

A10

A9

A8

A7

A6

GND

PIN DESCRIPTIONS

A0-A11

Address Inputs

I/O0-15

Data Inputs/Outputs

WE

Write Enable

OE

Output Enable

RAS

Row Address Strobe

UCAS

Upper Column Address Strobe

LCAS

Lower Column Address Strobe

Vcc

Power

GND

Ground

NC

No Connection